Verilog by example : a concise introduction for FPGA design
Material type:
TextPublication details: North Carolina : Full Arc Press, ©2011Description: 114 p. : ill. ; 24 cmISBN: - 9780983497301
- 621.39 REA-V
| Item type | Current library | Collection | Call number | Status | Notes | Date due | Barcode | Item holds |
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IIITD General Stacks | Engineering and Allied Operation | 621.39 REA-V (Browse shelf(Opens below)) | Available | Gifted by Dr. Prasoon Tiwari | G02850 |
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| 621.382 STA-W Wireless communications and networking | 621.382 TRA-P Principles of communication systems simulation with wireless applications | 621.384 BIS-W Wireless communication : | 621.39 REA-V Verilog by example : a concise introduction for FPGA design | 621.392 LAM-H Hardware design verification : | 621.392 VIJ-P A practical guide for system verilog assertions | 621.902 MAT-C CNC programming : principles and applications |
Includes bibliographical references and index.
1. The Tool Flow
2. In and Out
3. Clocks and Registers
4. State Machines
5. Modular Design
6. Memories
7. Managing Clocks
8. I/O Flavors
9. A Taste of Simulation
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