Verilog by example : a concise introduction for FPGA design
Readler, Blaine C.
Verilog by example : a concise introduction for FPGA design by Blaine C. Readler - North Carolina : Full Arc Press, ©2011 - 114 p. : ill. ; 24 cm.
Includes bibliographical references and index.
1. The Tool Flow 2. In and Out 3. Clocks and Registers 4. State Machines 5. Modular Design 6. Memories 7. Managing Clocks 8. I/O Flavors 9. A Taste of Simulation
9780983497301
Field programmable gate arrays
Verilog (Computer hardware description language)
621.39 / REA-V
Verilog by example : a concise introduction for FPGA design by Blaine C. Readler - North Carolina : Full Arc Press, ©2011 - 114 p. : ill. ; 24 cm.
Includes bibliographical references and index.
1. The Tool Flow 2. In and Out 3. Clocks and Registers 4. State Machines 5. Modular Design 6. Memories 7. Managing Clocks 8. I/O Flavors 9. A Taste of Simulation
9780983497301
Field programmable gate arrays
Verilog (Computer hardware description language)
621.39 / REA-V