Verilog by example : (Record no. 209244)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00978nam a22003137a 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | IIITD |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20250813170701.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 250731b |||||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9780983497301 |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | IIITD |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.39 |
| Item number | REA-V |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Readler, Blaine C. |
| 245 ## - TITLE STATEMENT | |
| Title | Verilog by example : |
| Remainder of title | a concise introduction for FPGA design |
| Statement of responsibility, etc | by Blaine C. Readler |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication, distribution, etc | North Carolina : |
| Name of publisher, distributor, etc | Full Arc Press, |
| Date of publication, distribution, etc | ©2011 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 114 p. : |
| Other physical details | ill. ; |
| Dimensions | 24 cm. |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE | |
| Bibliography, etc | Includes bibliographical references and index. |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Title | 1. The Tool Flow |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Title | 2. In and Out |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Title | 3. Clocks and Registers |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Title | 4. State Machines |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Title | 5. Modular Design |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Title | 6. Memories |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Title | 7. Managing Clocks |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Title | 8. I/O Flavors |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Title | 9. A Taste of Simulation |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Field programmable gate arrays |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Verilog (Computer hardware description language) |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Books |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Collection code | Home library | Current library | Shelving location | Date acquired | Cost, normal purchase price | Total Checkouts | Full call number | Barcode | Date last seen | Cost, replacement price | Price effective from | Vendor/Supplier | Koha item type | Public note |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | Engineering and Allied Operation | IIITD | IIITD | General Stacks | 31/07/2025 | 1744.74 | 621.39 REA-V | G02850 | 31/07/2025 | $19.95 | 31/07/2025 | Gifted by Dr. Prasoon Tiwari | Books | Gifted by Dr. Prasoon Tiwari |