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VLSI test principles and architectures : design for testability

Contributor(s): Material type: TextTextSeries: The Morgan Kaufmann series in systems on siliconPublication details: New Delhi : Elsevier, ©2006.Description: xxx, 777 p. : ill. ; 25 cmISBN:
  • 9789380501550
Subject(s): DDC classification:
  • 621.395 22 WAN-V
LOC classification:
  • TK7874.75 .V587 2006
Online resources:
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Holdings
Item type Current library Collection Call number Status Date due Barcode Item holds
Books Books IIITD Reference Electronics and Communication Engineering REF 621.395 WAN-V (Browse shelf(Opens below)) Available 008153
Books Books IIITD General Stacks Electronics and Communication Engineering 621.395 WAN-V (Browse shelf(Opens below)) Available 002299
Total holds: 0
Browsing IIITD shelves, Shelving location: Reference, Collection: Electronics and Communication Engineering Close shelf browser (Hides shelf browser)
REF 621.395 SAU-I Introduction to VLSI design flow REF 621.395 TAU-F Fundamentals of modern VLSI devices REF 621.395 WAK-D Digital design : REF 621.395 WAN-V VLSI test principles and architectures : REF 621.395 WES-C CMOS VLSI design : REF 621.395 WES-C CMOS VLSI design : REF 621.397 ABU-N Nanometer variation-tolerant SRAM :

Includes bibliographical references and index.

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