| 000 | 01466cam a22003737a 4500 | ||
|---|---|---|---|
| 001 | 14657453 | ||
| 005 | 20170731150326.0 | ||
| 008 | 061206s2007 nyua b 001 0 eng | ||
| 010 | _a 2006939848 | ||
| 015 |
_aGBA689709 _2bnb |
||
| 016 | 7 |
_a013583769 _2Uk |
|
| 020 | _a9788184893885 | ||
| 035 | _a(OCoLC)ocm74522699 | ||
| 040 |
_aUKM _cUKM _dBAKER _dBTCTA _dYDXCP _dIXA _dDLC |
||
| 042 |
_aukblsr _alccopycat |
||
| 050 | 0 | 0 |
_aTK7874.75 _b.S39 2007 |
| 082 | 0 | 4 |
_a621.395 _222 _bSAX-R |
| 100 | 1 | _aSaxena, Prashant | |
| 245 | 1 | 0 |
_aRouting congestion in VLSI circuits : _bestimation and optimization _cPrashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar. |
| 260 |
_aNew York : _bSpringer, _cc2007. |
||
| 300 |
_axiv, 248 p. : _bill. ; _c24 cm. |
||
| 440 | 0 | _aSeries on integrated circuits and systems | |
| 504 | _aIncludes bibliographical references and index. | ||
| 650 | 0 |
_aIntegrated circuits _xVery large scale integration. |
|
| 650 | 0 | _aRouting (Computer network management) | |
| 700 | 1 | _aShelar, Rupesh S. | |
| 700 | 1 | _aSapatnekar, Sachin S. | |
| 856 | 4 | 1 |
_3Table of contents _uhttp://www.loc.gov/catdir/toc/fy0803/2006939848.html |
| 856 | 4 | 2 |
_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy0824/2006939848-d.html |
| 906 |
_a7 _bcbc _ccopycat _d2 _encip _f20 _gy-gencatlg |
||
| 942 |
_2ddc _cBK |
||
| 999 |
_c8386 _d8386 |
||