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020 | _a9780471441489 | ||
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050 | 4 | _aTK7885.7 | |
082 | 0 | 0 |
_a621.392 _222 _bPAD-D |
100 | 1 |
_aPadmanabhan, T. R. _eAuthor |
|
210 | 1 | 0 | _aDesign Through Verilog HDL |
245 | 1 | 0 | _aDesign through verilog HDL |
260 |
_c2003. _aNew Delhi : _bWiley, |
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300 | _axii, 455 p. | ||
506 | _aLicense restrictions may limit access. | ||
520 | 8 |
_aAnnotation _bA comprehensive resource on Verilog HDL for beginners and expertsLarge and complicated digital circuits can be incorporated into hardware by using Verilog, a hardware description language (HDL). A designer aspiring to master this versatile language must first become familiar with its constructs, practice their use in real applications, and apply them in combinations in order to be successful. Design Through Verilog HDL affords novices the opportunity to perform all of these tasks, while also offering seasoned professionals a comprehensive resource on this dynamic tool.Describing a design using Verilog is only half the story: writing test-benches, testing a design for all its desired functions, and how identifying and removing the faults remain significant challenges. Design Through Verilog HDL addresses each of these issues concisely and effectively. The authors discuss constructs through illustrative examples that are tested with popular simulation packages, ensuring the subject matter remains practically relevant.Other important topics covered include:PrimitivesGate and Net delaysBuffersCMOS switchesState machine designFurther, the authors focus on illuminating the differences between gate level, data flow, and behavioral styles of Verilog, a critical distinction for designers. The book's final chapters deal with advanced topics such as timescales, parameters and related constructs, queues, and switch level design.Each chapter concludes with exercises that both ensure readers have mastered the present material and stimulate readers to explore avenues of their own choosing. Written and assembled in a paced, logical manner, Design Through Verilog HDL provides professionals, graduate students, and advanced undergraduates with a one-of-a-kind resource. |
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521 |
_aScholarly & Professional _bJohn Wiley & Sons, Incorporated |
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650 | _aSystem design | ||
658 | _aVerilog | ||
700 | 1 |
_aSundari, B. Bala Tripura _eAuthor |
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773 | 0 | _tIEEE-Wiley eBooks Library | |
910 | _aBowker Global Books in Print record | ||
942 |
_2ddc _cBK _06 |
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999 |
_c7966 _d7966 |