| 000 | 00702nam a22002057a 4500 | ||
|---|---|---|---|
| 003 | IIITD | ||
| 005 | 20190626123144.0 | ||
| 008 | 190626b xxu||||| |||| 00| 0 eng d | ||
| 040 | _aIIITD | ||
| 082 | _bMON-P | ||
| 100 | _aMondal, Hemanta Kumar. | ||
| 245 |
_aPower-and performance-aware on-chip interconnection architectures for many-core systems _cHemanta Kumar Mondal, Sujay Deb, (Advisor) |
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| 260 |
_aNew Delhi : _bIIITD, _c©April,2017 |
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| 300 |
_axvi, 135p. : _bill. ; _c29cm. |
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| 504 | _aInclude bibliography | ||
| 650 | _aChip -- Interconnection Architectures | ||
| 700 |
_aDeb, Sujay _eAdvisor |
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| 856 | _uhttps://shodhganga.inflibnet.ac.in/handle/10603/183750 | ||
| 942 |
_2ddc _cTH |
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| 999 |
_c23684 _d23684 |
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