Course reserves for Advanced Digital Design and Verification (New)
- Term: MNS25
- Department: ECE
- Course number: ECE527/ECE512
- Section: UG/PG
- Instructors:
- Dr. Sneh Saurabh
| Title | Author | Item type | Location | Collection | Call number | Copy number | Status | Date due | Notes | Link |
|---|---|---|---|---|---|---|---|---|---|---|
| Introduction to VLSI design flow | Saurabh, Sneh | Books | IIITD Reference |
Electronics and Communication Engineering | REF 621.395 SAU-I | Not for loan | Reference | |||
| Electronic design automation for IC system design, verification, and testing | Lavagno, Luciano | Books | IIITD Reference |
Computer Science and Engineering | REF 621.3815 LAV-E | Not for loan | Reference | |||
| SystemVerilog for verification : | Spear, Chris | Reference | IIITD Reference |
Electronics and Communication Engineering | REF 621.392 SPE-S | Not for loan | Reference | |||
| System verilog assertions and functional coverage : | Mehta, Ashok B. | Reference | IIITD Reference |
Computer Science and Engineering | REF 621.392 MEH-S | Not for loan | Reference | |||
| Synthesis and optimization of digital circuits | De Micheli, Giovanni. | Books | IIITD General Stacks |
Electronics and Communication Engineering | 621.395 MIC-S | Not for loan | Reference | Record URL | ||
| Practical design verification | Books | IIITD Reference |
Electronics and Communication Engineering | REF 621.381 PRA-P | Not for loan | Reference |