Advanced computer architecture (Record no. 189867)
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000 -LEADER | |
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fixed length control field | 01215nam a22003737a 4500 |
003 - CONTROL NUMBER IDENTIFIER | |
control field | IIITD |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20250215125307.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 250212b |||||||| |||| 00| 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9789390727490 |
040 ## - CATALOGING SOURCE | |
Original cataloging agency | IIITD |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 004.22 |
Item number | SAR-A |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Sarangi, Smruti Ranjan |
245 ## - TITLE STATEMENT | |
Title | Advanced computer architecture |
Statement of responsibility, etc | by Smruti Ranjan Sarangi |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication, distribution, etc | Chennai : |
Name of publisher, distributor, etc | McGraw Hill, |
Date of publication, distribution, etc | ©2021 |
300 ## - PHYSICAL DESCRIPTION | |
Extent | xviii, 688 p. : |
Other physical details | ill. ; |
Dimensions | 24 cm. |
500 ## - GENERAL NOTE | |
General note | Include Index |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 1.Introduction |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 2. Out-of-order pipelines |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 3. The fetch and decode stages |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 4. The issue, execute and commit stages |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 5. Alternative approaches to issue and commit |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 6. Graphics processors |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 7. Caches |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 8. On-chip network |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 9. Multicore systems: coherence, consistency and transactional memory |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 10. Main memory |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 11. Power and temperature |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 12. Reliability |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 13. Secure processor architectures |
505 ## - FORMATTED CONTENTS NOTE | |
Title | 14. Architectures for machine learning |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Computer organization |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Computer architecture |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | Books |
Source of classification or shelving scheme | Dewey Decimal Classification |
Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Collection code | Home library | Current library | Shelving location | Date acquired | Bill No. | Bill Date | Cost, normal purchase price | PO No. | PO Date | Total Checkouts | Full call number | Barcode | Date last seen | Cost, replacement price | Price effective from | Vendor/Supplier | Koha item type |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Dewey Decimal Classification | Computer Science and Engineering | IIITD | IIITD | General Stacks | 12/02/2025 | 2024-25/2380 | 2025-02-07 | 836.55 | IIITD/LIC/BS/2024/04/03 | 2025-01-24 | 004.22 SAR-A | 013187 | 12/02/2025 | 1170 | 12/02/2025 | Indica Publishers & Distributors Pvt. Ltd. | Books |