Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design (Record no. 176636)

MARC details
000 -LEADER
fixed length control field 04110nam a22005535i 4500
001 - CONTROL NUMBER
control field 978-981-19-8551-5
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20240423125321.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230301s2023 si | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9789811985515
-- 978-981-19-8551-5
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-981-19-8551-5
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7885-7895
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TA169-169.3
072 #7 - SUBJECT CATEGORY CODE
Subject category code UK
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code COM067000
Source bisacsh
072 #7 - SUBJECT CATEGORY CODE
Subject category code UK
Source thema
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004.24
Edition number 23
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Li, Xiaowei.
Relator term author.
Relator code aut
-- http://id.loc.gov/vocabulary/relators/aut
245 10 - TITLE STATEMENT
Title Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design
Medium [electronic resource] :
Remainder of title A Self-Test, Self-Diagnosis, and Self-Repair-Based Approach /
Statement of responsibility, etc by Xiaowei Li, Guihai Yan, Cheng Liu.
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2023.
264 #1 -
-- Singapore :
-- Springer Nature Singapore :
-- Imprint: Springer,
-- 2023.
300 ## - PHYSICAL DESCRIPTION
Extent XVIII, 304 p. 1 illus.
Other physical details online resource.
336 ## -
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-- txt
-- rdacontent
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-- computer
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-- rdamedia
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-- online resource
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-- text file
-- PDF
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505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Chapter 1: Introduction -- Chapter 2: Fault-tolerant general circuits with 3S -- Chapter 3: Fault-tolerant general purposed processors with 3S -- Chapter 4: Fault-tolerant network-on-chip with 3S -- Chapter 5: Fault-tolerant deep learning processors with 3S -- Chapter 6: Conclusion.
520 ## - SUMMARY, ETC.
Summary, etc With the end of Dennard scaling and Moore’s law, IC chips, especially large-scale ones, now face more reliability challenges, and reliability has become one of the mainstay merits of VLSI designs. In this context, this book presents a built-in on-chip fault-tolerant computing paradigm that seeks to combine fault detection, fault diagnosis, and error recovery in large-scale VLSI design in a unified manner so as to minimize resource overhead and performance penalties. Following this computing paradigm, we propose a holistic solution based on three key components: self-test, self-diagnosis and self-repair, or “3S” for short. We then explore the use of 3S for general IC designs, general-purpose processors, network-on-chip (NoC) and deep learning accelerators, and present prototypes to demonstrate how 3S responds to in-field silicon degradation and recovery under various runtime faults caused by aging, process variations, or radical particles. Moreover, we demonstrate that 3S not onlyoffers a powerful backbone for various on-chip fault-tolerant designs and implementations, but also has farther-reaching implications such as maintaining graceful performance degradation, mitigating the impact of verification blind spots, and improving chip yield. This book is the outcome of extensive fault-tolerant computing research pursued at the State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences over the past decade. The proposed built-in on-chip fault-tolerant computing paradigm has been verified in a broad range of scenarios, from small processors in satellite computers to large processors in HPCs. Hopefully, it will provide an alternative yet effective solution to the growing reliability challenges for large-scale VLSI designs. .
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computers.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer architecture.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Hardware Performance and Reliability.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Hardware.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Processor Architectures.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Yan, Guihai.
Relator term author.
Relator code aut
-- http://id.loc.gov/vocabulary/relators/aut
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Liu, Cheng.
Relator term author.
Relator code aut
-- http://id.loc.gov/vocabulary/relators/aut
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer Nature eBook
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9789811985508
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9789811985522
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9789811985539
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier <a href="https://doi.org/10.1007/978-981-19-8551-5">https://doi.org/10.1007/978-981-19-8551-5</a>
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912 ## -
-- ZDB-2-SXCS
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks-CSE-Springer

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