000			01439cam a22003494a 4500
001			14278872
003			IIITD
005			20210206152116.0
008			060227s2006 ne a b 001 0 eng
010			_a 2006006869
020			_a9789380501550
035			_a(OCoLC)ocm64624834
040			_aDLC _cDLC _dBAKER _dC#P _dIXA _dDLC
042			_apcc
050	0	0	_aTK7874.75 _b.V587 2006
082	0	0	_a621.395 _222 _bWAN-V
245	0	0	_aVLSI test principles and architectures : _bdesign for testability _cedited by Laung-Terng Wang, Cheng-Wen Wu and Xiaoqing Wen.
260			_aNew Delhi : _bElsevier, _c©2006.
300			_axxx, 777 p. : _bill. ; _c25 cm.
440		4	_aThe Morgan Kaufmann series in systems on silicon
504			_aIncludes bibliographical references and index.
650		0	_aIntegrated circuits _xVery large scale integration _xTesting.
650		0	_aIntegrated circuits _xVery large scale integration _xDesign.
700	1		_aWang, Laung-Terng _eeditor
700	1		_aWu, Cheng-Wen _eeditor
700	1		_aWen, Xiaoqing _eeditor
856	4	1	_3Table of contents _uhttp://www.loc.gov/catdir/toc/ecip069/2006006869.html
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy0632/2006006869-d.html
906			_a7 _bcbc _corignew _d1 _eecip _f20 _gy-gencatlg
942			_2ddc _cBK _03
999			_c8174 _d8174