000 | 01922nam a22002417a 4500 | ||
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003 | IIITD | ||
005 | 20240830101807.0 | ||
008 | 240826b |||||||| |||| 00| 0 eng d | ||
020 | _a9780521859721 | ||
040 | _aIIITD | ||
082 | 0 | 0 |
_a621.381 _bPRA-P |
245 | 0 | 0 |
_aPractical design verification _cedited by Dhiraj K. Pradhan and Ian G. Harris |
260 |
_aNew York : _bCambridge University Press, _c©2009 |
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300 |
_axi, 276 p. : _bill. ; _c26 cm. |
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504 | _aIncludes bibliographical references and index. | ||
505 | 0 |
_t1. Model checking and equivalence checking _t2. Transaction-level system modeling _t3. Response checkers, monitors, and assertions _t4. System debugging strategies _t5. Test generation and coverage metrics _t6. SystemVerilog and Vera in a verification flow _t7. Decision diagrams for verification _t8. Boolean satisfiability and EDA applications |
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520 | _aImprove design efficiency and reduce costs with this practical guide to formal and simulation-based functional verification. Giving you a theoretical and practical understanding of the key issues involved, expert authors including Wayne Wolf and Dan Gajski explain both formal techniques (model checking, equivalence checking) and simulation-based techniques (coverage metrics, test generation). You get insights into practical issues including hardware verification languages (HVLs) and system-level debugging. The foundations of formal and simulation-based techniques are covered too, as are more recent research advances including transaction-level modeling and assertion-based verification, plus the theoretical underpinnings of verification, including the use of decision diagrams and Boolean satisfiability (SAT). | ||
650 | 0 | _aIntegrated circuits | |
650 | 0 | _aTechnology & Engineering -- Electronics -- Circuits -- Integrated. | |
700 | 1 |
_aPradhan, Dhiraj K. _eeditor |
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700 | 1 |
_aHarris, Ian G. _eeditor |
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942 |
_2ddc _cBK |
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999 |
_c189509 _d189509 |