000 | 04912nam a22006135i 4500 | ||
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001 | 978-3-540-39724-3 | ||
003 | DE-He213 | ||
005 | 20240423132443.0 | ||
007 | cr nn 008mamaa | ||
008 | 121227s2003 gw | s |||| 0|eng d | ||
020 |
_a9783540397243 _9978-3-540-39724-3 |
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024 | 7 |
_a10.1007/b93958 _2doi |
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050 | 4 | _aQA75.5-76.95 | |
072 | 7 |
_aUYA _2bicssc |
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072 | 7 |
_aCOM014000 _2bisacsh |
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072 | 7 |
_aUYA _2thema |
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082 | 0 | 4 |
_a004.0151 _223 |
245 | 1 | 0 |
_aCorrect Hardware Design and Verification Methods _h[electronic resource] : _b12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, L'Aquila, Italy, October 21-24, 2003, Proceedings / _cedited by Daniel Geist, Enrico Tronci. |
250 | _a1st ed. 2003. | ||
264 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2003. |
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300 |
_aXII, 432 p. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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_aonline resource _bcr _2rdacarrier |
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_atext file _bPDF _2rda |
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490 | 1 |
_aLecture Notes in Computer Science, _x1611-3349 ; _v2860 |
|
505 | 0 | _aInvited Talks -- What Is beyond the RTL Horizon for Microprocessor and System Design? -- The Charme of Abstract Entities -- Tutorial -- The PSL/Sugar Specification Language A Language for all Seasons -- Software Verification -- Finding Regularity: Describing and Analysing Circuits That Are Not Quite Regular -- Predicate Abstraction with Minimum Predicates -- Efficient Symbolic Model Checking of Software Using Partial Disjunctive Partitioning -- Processor Verification -- Instantiating Uninterpreted Functional Units and Memory System: Functional Verification of the VAMP -- A Hazards-Based Correctness Statement for Pipelined Circuits -- Analyzing the Intel Itanium Memory Ordering Rules Using Logic Programming and SAT -- Automata Based Methods -- On Complementing Nondeterministic Büchi Automata -- Coverage Metrics for Formal Verification -- “More Deterministic” vs. “Smaller” Büchi Automata for Efficient LTL Model Checking -- Short Papers 1 -- An Optimized Symbolic Bounded Model Checking Engine -- Constrained Symbolic Simulation with Mathematica and ACL2 -- Semi-formal Verification of Memory Systems by Symbolic Simulation -- CTL May Be Ambiguous When Model Checking Moore Machines -- Specification Methods -- Reasoning about GSTE Assertion Graphs -- Towards Diagrammability and Efficiency in Event Sequence Languages -- Executing the Formal Semantics of the Accellera Property Specification Language by Mechanised Theorem Proving -- Protocol Verification -- On Combining Symmetry Reduction and Symbolic Representation for Efficient Model Checking -- On the Correctness of an Intrusion-Tolerant Group Communication Protocol -- Exact and Efficient Verification of Parameterized Cache Coherence Protocols -- Short Papers 2 -- Design and Implementation of an Abstract Interpreter for VHDL -- A ProgrammingLanguage Based Analysis of Operand Forwarding -- Integrating RAM and Disk Based Verification within the Mur? Verifier -- Design and Verification of CoreConnectTM IP Using Esterel -- Theorem Proving -- Inductive Assertions and Operational Semantics -- A Compositional Theory of Refinement for Branching Time -- Linear and Nonlinear Arithmetic in ACL2 -- Bounded Model Checking -- Efficient Distributed SAT and SAT-Based Distributed Bounded Model Checking -- Convergence Testing in Term-Level Bounded Model Checking -- The ROBDD Size of Simple CNF Formulas -- Model Checking and Application -- Efficient Hybrid Reachability Analysis for Asynchronous Concurrent Systems -- Finite Horizon Analysis of Markov Chains with the Mur? Verifier -- Improved Symbolic Verification Using Partitioning Techniques. | |
650 | 0 | _aComputer science. | |
650 | 0 | _aComputers. | |
650 | 0 | _aSoftware engineering. | |
650 | 0 | _aMachine theory. | |
650 | 0 | _aArtificial intelligence. | |
650 | 1 | 4 | _aTheory of Computation. |
650 | 2 | 4 | _aComputer Hardware. |
650 | 2 | 4 | _aComputer Science Logic and Foundations of Programming. |
650 | 2 | 4 | _aSoftware Engineering. |
650 | 2 | 4 | _aFormal Languages and Automata Theory. |
650 | 2 | 4 | _aArtificial Intelligence. |
700 | 1 |
_aGeist, Daniel. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
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700 | 1 |
_aTronci, Enrico. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
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710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783540203636 |
776 | 0 | 8 |
_iPrinted edition: _z9783662163191 |
830 | 0 |
_aLecture Notes in Computer Science, _x1611-3349 ; _v2860 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/b93958 |
912 | _aZDB-2-SCS | ||
912 | _aZDB-2-SXCS | ||
912 | _aZDB-2-LNC | ||
912 | _aZDB-2-BAE | ||
942 | _cSPRINGER | ||
999 |
_c187920 _d187920 |