000 05819nam a22006255i 4500
001 978-3-540-69644-5
003 DE-He213
005 20240423132441.0
007 cr nn 008mamaa
008 121227s1997 gw | s |||| 0|eng d
020 _a9783540696445
_9978-3-540-69644-5
024 7 _a10.1007/BFb0024199
_2doi
050 4 _aQA75.5-76.95
072 7 _aUYA
_2bicssc
072 7 _aCOM014000
_2bisacsh
072 7 _aUYA
_2thema
082 0 4 _a004.0151
_223
245 1 0 _aHigh Performance Computing
_h[electronic resource] :
_bInternational Symposium, ISHPC'97, Fukuoka, Japan, November 4-6, 1997, Proceedings /
_cedited by Constantine Polychronopoulos, Kazuki Joe, Keijiro Araki, Makoto Amamiya.
250 _a1st ed. 1997.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg :
_bImprint: Springer,
_c1997.
300 _aXIII, 423 p. 203 illus., 6 illus. in color.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aLecture Notes in Computer Science,
_x1611-3349 ;
_v1336
505 0 _aThe generation of optimized codes using nonzero structure analysis -- On the importance of an end-to-end view of memory consistency in future computer systems -- High performance distributed object systems -- Instruction cache prefetching using multilevel branch prediction -- High performance wireless computing -- High-performance computing and applications in image processing and computer vision -- Present and future of HPC technologies -- Evaluation of multithreaded processors and thread-switch policies -- A multithreaded implementation concept of prolog on Datarol-II machine -- Thread Synchronization Unit (TSU): A building block for high performance computers -- Data dependence path reduction with tunneling load instructions -- Performance estimation of embedded software with pipeline and cache hazard modeling -- An implementation and evaluation of a distributed shared-memory system on workstation clusters using fast serial links -- Designing and optimizing 3-connectivity communication networks using a distributed genetic algorithm -- Adaptive routing on the Recursive Diagonal Torus -- Achieving multi-level parallelization -- A technique to eliminate redundant inter-processor communication on parallelizing compiler TINPAR -- An automatic vectorizing/parallelizing Pascal compiler V-Pascal ver. 3 -- An algorithm for automatic detection of loop indices for communication overlapping -- NaraView: An interactive 3D visualization system for parallelization of programs -- Hybrid approach for non-strict dataflow program on commodity machine -- Resource management methods for general purpose massively parallel OS SSS-CORE -- Scenario-based hypersequential programming: Formulation of parallelization -- Parallelization of space plasma particle simulation -- Implementing iterative solvers for irregularsparse matrix problems in high performance Fortran -- Parallel navigation in an A-NETL based parallel OODBMS -- High performance parallel FFT on distributed memory parallel computers -- Parallel computation model logPQ -- Cost estimation of coherence protocols of software managed cache on distributed shared memory system -- A portable distributed shared memory system on the cluster environment: Design and implementation fully in software -- An object-oriented framework for loop parallelization -- A method for runtime recognition of collective communication on distributed-memory multiprocessors -- Improving the performance of automated forward deduction system EnCal -- Efficiency of parallel machine for large-scale simulation in computational physics -- Parallel PDB data retriever “PDB diving booster” -- A parallelization method for neural networks with weak connection design -- Exploiting parallel computers to reduce neural network training time of real applications.
520 _aThis book constitutes the refereed proceedings of the International Symposium on High Performance Computing, ISHPC '97, held in Fukuoka, Japan in November 1997. The volume presents four distinguished papers and 16 revised regular papers selected from more than 40 submissions on the basis of at least three peer reviews. Also included are seven invited contributions by leading authorities and 10 selected poster presentations. The papers are organized in topical chapters on high performance systems architectures, networks, compilers, systems software, and applications in various areas.
650 0 _aComputer science.
650 0 _aSoftware engineering.
650 0 _aComputer engineering.
650 0 _aComputer networks .
650 0 _aNumerical analysis.
650 1 4 _aTheory of Computation.
650 2 4 _aSoftware Engineering.
650 2 4 _aComputer Engineering and Networks.
650 2 4 _aNumerical Analysis.
700 1 _aPolychronopoulos, Constantine.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aJoe, Kazuki.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aAraki, Keijiro.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aAmamiya, Makoto.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
710 2 _aSpringerLink (Online service)
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783540637660
776 0 8 _iPrinted edition:
_z9783662164525
830 0 _aLecture Notes in Computer Science,
_x1611-3349 ;
_v1336
856 4 0 _uhttps://doi.org/10.1007/BFb0024199
912 _aZDB-2-SCS
912 _aZDB-2-SXCS
912 _aZDB-2-LNC
912 _aZDB-2-BAE
942 _cSPRINGER
999 _c187882
_d187882