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020 _a9783030788414
_9978-3-030-78841-4
024 7 _a10.1007/978-3-030-78841-4
_2doi
050 4 _aTK7867-7867.5
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
072 7 _aTJFC
_2thema
082 0 4 _a621.3815
_223
245 1 0 _aBehavioral Synthesis for Hardware Security
_h[electronic resource] /
_cedited by Srinivas Katkoori, Sheikh Ariful Islam.
250 _a1st ed. 2022.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2022.
300 _aXV, 398 p. 154 illus., 118 illus. in color.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
505 0 _aIntroduction -- Background -- Techniques for algorithm-level obfuscation during high-level synthesis -- High-level synthesis of key based obfuscated RTL datapaths -- RTL Hardware IP protection Using Key-Based Control and Data Flow Obfuscation -- Empirical Word-Level Analysis of Arithmetic Module Architectures for Hardware Trojan Susceptibility -- Behavioral synthesis techniques for intellectual property protection -- Exploring Low Cost Optimal Watermark for Reusable IP Cores During High Level Synthesis -- High-Level Synthesis for Side-Channel Defense -- On state encoding against power analysis attacks for finite state controllers -- Examining the consequences of high-level synthesis optimizations on power side-channel -- Towards a timing attack aware high-level synthesis of integrated circuits -- High-Level Synthesis with Timing-Sensitive Information Flow Enforcement -- Mitigating information leakage during critical communication using S*FSM -- Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPsThrough Security-Driven Task Scheduling -- Securing industrial control system with high level synthesis -- Conclusions and open research problems.
520 _aThis book presents state-of-the-art research results from leading electronic design automation (EDA) researchers on automated approaches for generating cyber-secure, smart hardware. The authors first provide brief background on high-level synthesis principles and motivate the need for secure design during behavioral synthesis. Then they provide readers with synthesis techniques for six automated security solutions, namely, hardware obfuscation, hardware Trojan detection, IP watermarking, state encoding, side channel attack resistance, and information flow tracking. Provides a single-source reference to behavioral synthesis for hardware security; Describes automatic synthesis techniques for algorithmic obfuscation, using code transformations; Includes behavioral synthesis techniques for intellectual property protection.
650 0 _aElectronic circuits.
650 0 _aCooperating objects (Computer systems).
650 0 _aMicroprocessors.
650 0 _aComputer architecture.
650 1 4 _aElectronic Circuits and Systems.
650 2 4 _aCyber-Physical Systems.
650 2 4 _aProcessor Architectures.
700 1 _aKatkoori, Srinivas.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aIslam, Sheikh Ariful.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
710 2 _aSpringerLink (Online service)
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783030788407
776 0 8 _iPrinted edition:
_z9783030788421
776 0 8 _iPrinted edition:
_z9783030788438
856 4 0 _uhttps://doi.org/10.1007/978-3-030-78841-4
912 _aZDB-2-SCS
912 _aZDB-2-SXCS
942 _cSPRINGER
999 _c179256
_d179256