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020 _a9783540302063
_9978-3-540-30206-3
024 7 _a10.1007/b100824
_2doi
050 4 _aQA75.5-76.95
072 7 _aUYA
_2bicssc
072 7 _aCOM014000
_2bisacsh
072 7 _aUYA
_2thema
082 0 4 _a004.0151
_223
245 1 0 _aFormal Techniques, Modelling and Analysis of Timed and Fault-Tolerant Systems
_h[electronic resource] :
_bJoint International Conferences on Formal Modeling and Analysis of Timed Systems, FORMATS 2004 and Formal Techniques in Real Time and Fault-Tolerant Systems, FTRTFT 2004, Grenoble, France, September 22-24, 2004, Proceedings /
_cedited by Yassine Lakhnech, Sergio Yovine.
250 _a1st ed. 2004.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg :
_bImprint: Springer,
_c2004.
300 _aX, 402 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aLecture Notes in Computer Science,
_x1611-3349 ;
_v3253
505 0 _aInvited Papers -- From Software to Hardware and Back -- Of Elections and Electrons -- Regular Papers -- Formal Verification of an Avionics Sensor Voter Using SCADE -- Mixed Delay and Threshold Voters in Critical Real-Time Systems -- Towards a Methodological Approach to Specification and Analysis of Dependable Automation Systems -- On Two-Sided Approximate Model-Checking: Problem Formulation and Solution via Finite Topologies -- On Timed Automata with Input-Determined Guards -- Decomposing Verification of Timed I/O Automata -- Symbolic Model Checking for Simply-Timed Systems -- Robustness and Implementability of Timed Automata -- Real-Time Testing with Timed Automata Testers and Coverage Criteria -- Monitoring Temporal Properties of Continuous Signals -- A Unified Fault-Tolerance Protocol -- Automating the Addition of Fail-Safe Fault-Tolerance: Beyond Fusion-Closed Specifications -- Modeling and Verification of a Fault-Tolerant Real-Time Startup Protocol Using Calendar Automata -- Static Fault-Tolerant Real-Time Scheduling with “Pseudo-topological” Orders -- The Influence of Durational Actions on Time Equivalences -- Bounded Model Checking for Region Automata -- Some Progress in Satisfiability Checking for Difference Logic -- Model-Checking for Weighted Timed Automata -- Symbolic Model Checking for Probabilistic Timed Automata -- Structured Modeling of Concurrent Stochastic Hybrid Systems -- Computing Schedules for Multithreaded Real-Time Programs Using Geometry -- Forward Reachability Analysis of Timed Petri Nets -- Lazy Approximation for Dense Real-Time Systems -- Learning of Event-Recording Automata.
650 0 _aComputer science.
650 0 _aCompilers (Computer programs).
650 0 _aMicroprocessors.
650 0 _aComputer architecture.
650 0 _aComputers, Special purpose.
650 0 _aSoftware engineering.
650 1 4 _aTheory of Computation.
650 2 4 _aComputer Science Logic and Foundations of Programming.
650 2 4 _aCompilers and Interpreters.
650 2 4 _aProcessor Architectures.
650 2 4 _aSpecial Purpose and Application-Based Systems.
650 2 4 _aSoftware Engineering.
700 1 _aLakhnech, Yassine.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
700 1 _aYovine, Sergio.
_eeditor.
_4edt
_4http://id.loc.gov/vocabulary/relators/edt
710 2 _aSpringerLink (Online service)
773 0 _tSpringer Nature eBook
776 0 8 _iPrinted edition:
_z9783540231677
776 0 8 _iPrinted edition:
_z9783662208878
830 0 _aLecture Notes in Computer Science,
_x1611-3349 ;
_v3253
856 4 0 _uhttps://doi.org/10.1007/b100824
912 _aZDB-2-SCS
912 _aZDB-2-SXCS
912 _aZDB-2-LNC
912 _aZDB-2-BAE
942 _cSPRINGER
999 _c176351
_d176351