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_a9783642023033 _9978-3-642-02303-3 |
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024 | 7 |
_a10.1007/978-3-642-02303-3 _2doi |
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_aEvolving OpenMP in an Age of Extreme Parallelism _h[electronic resource] : _b5th International Workshop on OpenMP, IWOMP 2009, Dresden, Germany, June 3-5, 2009 Proceedings / _cedited by Matthias S. Müller, Bronis R. de Supinski, Barbara Chapman. |
250 | _a1st ed. 2009. | ||
264 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2009. |
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300 |
_aX, 183 p. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
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490 | 1 |
_aProgramming and Software Engineering, _x2945-9168 ; _v5568 |
|
505 | 0 | _aFifth International Workshop on OpenMP IWOMP 2009 -- Parallel Simulation of Bevel Gear Cutting Processes with OpenMP Tasks -- Evaluation of Multicore Processors for Embedded Systems by Parallel Benchmark Program Using OpenMP -- Extending Automatic Parallelization to Optimize High-Level Abstractions for Multicore -- Scalability Evaluation of Barrier Algorithms for OpenMP -- Use of Cluster OpenMP with the Gaussian Quantum Chemistry Code: A Preliminary Performance Analysis -- Evaluating OpenMP 3.0 Run Time Systems on Unbalanced Task Graphs -- Dynamic Task and Data Placement over NUMA Architectures: An OpenMP Runtime Perspective -- Scalability of Gaussian 03 on SGI Altix: The Importance of Data Locality on CC-NUMA Architecture -- Providing Observability for OpenMP 3.0 Applications -- A Microbenchmark Suite for Mixed-Mode OpenMP/MPI -- Performance Profiling for OpenMP Tasks -- Tile Reduction: The First Step towards Tile Aware Parallelization in OpenMP -- A Proposal to Extend the OpenMP Tasking Model for Heterogeneous Architectures -- Identifying Inter-task Communication in Shared Memory Programming Models. | |
650 | 0 | _aComputer programming. | |
650 | 0 | _aComputer science. | |
650 | 0 | _aComputers. | |
650 | 0 |
_aElectronic digital computers _xEvaluation. |
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650 | 0 | _aMicroprocessors. | |
650 | 0 | _aComputer architecture. | |
650 | 0 | _aComputer systems. | |
650 | 1 | 4 | _aProgramming Techniques. |
650 | 2 | 4 | _aTheory of Computation. |
650 | 2 | 4 | _aHardware Performance and Reliability. |
650 | 2 | 4 | _aSystem Performance and Evaluation. |
650 | 2 | 4 | _aProcessor Architectures. |
650 | 2 | 4 | _aComputer System Implementation. |
700 | 1 |
_aMüller, Matthias S. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
|
700 | 1 |
_ade Supinski, Bronis R. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
|
700 | 1 |
_aChapman, Barbara. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783642022845 |
776 | 0 | 8 |
_iPrinted edition: _z9783642023040 |
830 | 0 |
_aProgramming and Software Engineering, _x2945-9168 ; _v5568 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-642-02303-3 |
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