| 000 | 00774nam a22002297a 4500 | ||
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| 003 | IIITD | ||
| 005 | 20230907153038.0 | ||
| 008 | 230818b xxu||||| |||| 00| 0 eng d | ||
| 040 | _aIIITD | ||
| 082 | _aREF ECE 2023 | ||
| 100 | _aRout, Sidhartha Sankar | ||
| 245 |
_aEfficient post-silicon debug platforms for future many-core system _cby Sidhartha Sankar Rout and Dr. Sujay Deb (Advisor) |
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| 260 |
_aNew Delhi : _bIIIT-Delhi, _c©2023 |
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| 300 |
_a127 p. : _bill. ; _c30 cm. |
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| 500 | _aThe thesis includes bibliographical references. | ||
| 650 | _aSystem validation | ||
| 650 | _aPost-silicon debug | ||
| 650 | _aWireless channel | ||
| 700 |
_aDeb, Sujay _eAdvisor |
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| 856 | _uhttps://shodhganga.inflibnet.ac.in/handle/10603/510694 | ||
| 942 |
_2ddc _cTH |
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| 999 |
_c171625 _d171625 |
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