Your search returned 8 results.

Results
	1.	Functional verification of programmable embedded architectures : a top-down approach by Mishra, Prabhat Dutt, Nikil Material type: Text; Format: print ; Literary form: Not fiction Publication details: New Delhi : Springer, 2005 Online access: Publisher description Table of contents only Availability: Items available for loan: IIITD (1)Call number: 004.22 MIS-F. Place hold Add to cart (remove)
	2.	Logic synthesis and verification algorithms by Hachtel, Gary D Somenzi, Fabio Material type: Text; Format: print ; Literary form: Not fiction Publication details: New York : Springer, c2006 Online access: Publisher description Table of contents only Availability: Items available for loan: IIITD (1)Call number: 621.395 HAC-L. Place hold Add to cart (remove)
	3.	Integrated circuit test engineering : modern techniques by Grout, Ian Material type: Text; Format: print ; Literary form: Not fiction ; Audience: Specialized; Publication details: London : Springer, c2006 Online access: Publisher description Contributor biographical information Table of contents only Availability: Items available for loan: IIITD (1)Call number: 621.381 GRO-I. Place hold Add to cart (remove)
	4.	Writing testbenches using system verilog by Bergeron, Janick Bergeron, Janick. Writing testbenches, functional verification of HDL models Material type: Text; Format: print ; Literary form: Not fiction Publication details: New Delhi : Springer, c2006 Online access: Publisher description Table of contents only Availability: Items available for loan: IIITD (1)Call number: 621.392 BER-W. Place hold Add to cart (remove)
	5.	Writing testbenches : functional verification of HDL models by Bergeron, Janick Edition: 2nd ed. Material type: Text; Format: print ; Literary form: Not fiction Publication details: Boston : Kluwer Academic Publishers, [2003] Online access: Publisher description Table of contents only Availability: Items available for loan: IIITD (1)Call number: 621.381 BER-W. Place hold Add to cart (remove)
	6.	Hardware design verification : simulation and formal method-based approaches by Lam, William K. C Series: Prentice Hall modern semiconductor design series Material type: Text; Format: print ; Literary form: Not fiction Publication details: Boston : PHI Learning, ©2005 Online access: Table of contents Availability: Items available for loan: IIITD (1)Call number: 621.392 LAM-H. Place hold Add to cart (remove)
	7.	System verilog assertions and functional coverage : guide to language, methodology and applications by Mehta, Ashok B Edition: 3rd ed. Material type: Text; Format: print ; Literary form: Not fiction Publication details: Los Gatos : Springer, ©2020 Availability: Not available: IIITD: Checked out (1). Add to cart (remove)
	8.	SystemVerilog for verification : a guide to learning the testbench language features by Spear, Chris Tumbush, Greg Edition: 3rd ed. Material type: Text; Format: print ; Literary form: Not fiction Publication details: New York : Springer, ©2012 Availability: Not available: IIITD: Checked out (1). Add to cart (remove)

© 2024 IIIT-Delhi, library@iiitd.ac.in

Powered by Koha