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Cryptographic Hardware and Embedded Systems -- CHES 2003 [electronic resource] : 5th International Workshop, Cologne, Germany, September 8-10, 2003, Proceedings /

Contributor(s): Material type: TextTextSeries: Lecture Notes in Computer Science ; 2779Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2003Edition: 1st ed. 2003Description: XIV, 446 p. online resourceContent type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 9783540452386
Subject(s): Additional physical formats: Printed edition:: No title; Printed edition:: No titleDDC classification:
  • 004.6 23
LOC classification:
  • TK5105.5-5105.9
Online resources:
Contents:
Invited Talk -- The Security Challenges of Ubiquitous Computing -- Side Channel Attack Methodology -- Multi-channel Attacks -- Hidden Markov Model Cryptanalysis -- Power-Analysis Attacks on an FPGA – First Experimental Results -- Hardware Factorization -- Hardware to Solve Sparse Systems of Linear Equations over GF(2) -- Symmetric Ciphers: Side Channel Attacks and Countermeasures -- Cryptanalysis of DES Implemented on Computers with Cache -- A Differential Fault Attack Technique against SPN Structures, with Application to the AES and Khazad -- A New Algorithm for Switching from Arithmetic to Boolean Masking -- DeKaRT: A New Paradigm for Key-Dependent Reversible Circuits -- Secure Hardware Logic -- Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers -- Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology -- Security Evaluation of Asynchronous Circuits -- Random Number Generators -- Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts -- True Random Number Generators Secure in a Changing Environment -- How to Predict the Output of a Hardware Random Number Generator -- Efficient Multiplication -- On Low Complexity Bit Parallel Polynomial Basis Multipliers -- Efficient Modular Reduction Algorithm in [x] and Its Application to “Left to Right” Modular Multiplication in [x] -- Faster Double-Size Modular Multiplication from Euclidean Multipliers -- More on Efficient Arithmetic -- Efficient Exponentiation for a Class of Finite Fields GF(2 n ) Determined by Gauss Periods -- GCD-Free Algorithms for Computing Modular Inverses -- Attacks on Asymmetric Cryptosystems -- Attacking Unbalanced RSA-CRT Using SPA -- The Doubling Attack – Why Upwards Is Better than Downwards.-An Analysis of Goubin’s Refined Power Analysis Attack -- A New Type of Timing Attack: Application to GPS -- Implementation of Symmetric Ciphers -- Unified Hardware Architecture for 128-Bit Block Ciphers AES and Camellia -- Very Compact FPGA Implementation of the AES Algorithm -- Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs -- Hyperelliptic Curve Cryptography -- Hyperelliptic Curve Cryptosystems: Closing the Performance Gap to Elliptic Curves -- Countermeasures against Differential Power Analysis for Hyperelliptic Curve Cryptosystems -- Countermeasures to Side Channel Leakage -- A Practical Countermeasure against Address-Bit Differential Power Analysis -- A More Flexible Countermeasure against Side Channel Attacks Using Window Method -- Security of Standards -- On the Security of PKCS #11 -- Attacking RSA-Based Sessions in SSL/TLS.
In: Springer Nature eBook
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Invited Talk -- The Security Challenges of Ubiquitous Computing -- Side Channel Attack Methodology -- Multi-channel Attacks -- Hidden Markov Model Cryptanalysis -- Power-Analysis Attacks on an FPGA – First Experimental Results -- Hardware Factorization -- Hardware to Solve Sparse Systems of Linear Equations over GF(2) -- Symmetric Ciphers: Side Channel Attacks and Countermeasures -- Cryptanalysis of DES Implemented on Computers with Cache -- A Differential Fault Attack Technique against SPN Structures, with Application to the AES and Khazad -- A New Algorithm for Switching from Arithmetic to Boolean Masking -- DeKaRT: A New Paradigm for Key-Dependent Reversible Circuits -- Secure Hardware Logic -- Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers -- Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology -- Security Evaluation of Asynchronous Circuits -- Random Number Generators -- Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts -- True Random Number Generators Secure in a Changing Environment -- How to Predict the Output of a Hardware Random Number Generator -- Efficient Multiplication -- On Low Complexity Bit Parallel Polynomial Basis Multipliers -- Efficient Modular Reduction Algorithm in [x] and Its Application to “Left to Right” Modular Multiplication in [x] -- Faster Double-Size Modular Multiplication from Euclidean Multipliers -- More on Efficient Arithmetic -- Efficient Exponentiation for a Class of Finite Fields GF(2 n ) Determined by Gauss Periods -- GCD-Free Algorithms for Computing Modular Inverses -- Attacks on Asymmetric Cryptosystems -- Attacking Unbalanced RSA-CRT Using SPA -- The Doubling Attack – Why Upwards Is Better than Downwards.-An Analysis of Goubin’s Refined Power Analysis Attack -- A New Type of Timing Attack: Application to GPS -- Implementation of Symmetric Ciphers -- Unified Hardware Architecture for 128-Bit Block Ciphers AES and Camellia -- Very Compact FPGA Implementation of the AES Algorithm -- Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs -- Hyperelliptic Curve Cryptography -- Hyperelliptic Curve Cryptosystems: Closing the Performance Gap to Elliptic Curves -- Countermeasures against Differential Power Analysis for Hyperelliptic Curve Cryptosystems -- Countermeasures to Side Channel Leakage -- A Practical Countermeasure against Address-Bit Differential Power Analysis -- A More Flexible Countermeasure against Side Channel Attacks Using Window Method -- Security of Standards -- On the Security of PKCS #11 -- Attacking RSA-Based Sessions in SSL/TLS.

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