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	1.	Routing congestion in VLSI circuits : estimation and optimization by Saxena, Prashant Shelar, Rupesh S Sapatnekar, Sachin S Series: Series on integrated circuits and systems Material type: Text; Format: print ; Literary form: Not fiction Publication details: New York : Springer, c2007 Online access: Table of contents Publisher description Availability: Items available for loan: IIITD (1)Call number: 621.395 SAX-R. Place hold Add to cart (remove)
	2.	Timing analysis and optimization of sequential circuits by Maheshwari, Naresh, 1970- Sapatnekar, Sachin S, 1967- Material type: Text; Format: print ; Literary form: Not fiction Publication details: Boston, Mass. : Kluwer Academic Publishers, c1999 Online access: Publisher description Table of contents only Availability: Items available for loan: IIITD (1)Call number: 621.395 MAH-T. Place hold Add to cart (remove)

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