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Numerical Validation in Current Hardware Architectures [electronic resource] : International Dagstuhl Seminar, Dagstuhl Castle, Germany, January 6-11, 2008, Revised Papers /

Contributor(s): Material type: TextTextSeries: Theoretical Computer Science and General Issues ; 5492Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2009Edition: 1st ed. 2009Description: XII, 263 p. online resourceContent type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 9783642015915
Subject(s): Additional physical formats: Printed edition:: No title; Printed edition:: No titleDDC classification:
  • 004 23
LOC classification:
  • QA75.5-76.95
Online resources:
Contents:
Standardization/Hardware -- Discussions on an Interval Arithmetic Standard at Dagstuhl Seminar 08021 -- Complete Interval Arithmetic and Its Implementation on the Computer -- Tools -- Continued Fractions for Special Functions: Handbook and Software -- A Modified Staggered Correction Arithmetic with Enhanced Accuracy and Very Wide Exponent Range -- C-XSC and Closely Related Software Packages -- Extending the Range of C-XSC: Some Tools and Applications for the Use in Parallel and Other Environments -- Mathematica Connectivity to Interval Libraries filib++ and C-XSC -- Applications -- Some Applications of Interval Arithmetic in Hierarchical Solid Modeling -- Numerical Verification Assessment in Computational Biomechanics -- Robustness of Boolean Operations on Subdivision-Surface Models -- Towards the Development of an Interval Arithmetic Environment for Validated Computer-Aided Design and Verification of Systems in Control Engineering -- Distributed Bounded-Error Parameter and State Estimation in Networks of Sensors -- Error Bounds for Lanczos Approximations of Rational Functions of Matrices -- Linear Systems -- Error-Free Transformation in Rounding Mode toward Zero -- Fast (Parallel) Dense Linear System Solvers in C-XSC Using Error Free Transformations and BLAS -- A Note on Solving Problem 7 of the SIAM 100-Digit Challenge Using C-XSC.
In: Springer Nature eBookSummary: This book constitutes the thoroughly refereed post-proceedings of the Dagstuhl Seminar 08021 on Numerical Validation in Current Hardware Architectures held at Dagstuhl Castle, Germany, in January 2008. The 16 revised full papers presented were selected during two rounds of reviewing and improvements. The papers are organized in topical sections on languages, software systems and tools, new verification techniques based on interval arithmetic, applications in science and engineering, and novel approaches to verification.
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Standardization/Hardware -- Discussions on an Interval Arithmetic Standard at Dagstuhl Seminar 08021 -- Complete Interval Arithmetic and Its Implementation on the Computer -- Tools -- Continued Fractions for Special Functions: Handbook and Software -- A Modified Staggered Correction Arithmetic with Enhanced Accuracy and Very Wide Exponent Range -- C-XSC and Closely Related Software Packages -- Extending the Range of C-XSC: Some Tools and Applications for the Use in Parallel and Other Environments -- Mathematica Connectivity to Interval Libraries filib++ and C-XSC -- Applications -- Some Applications of Interval Arithmetic in Hierarchical Solid Modeling -- Numerical Verification Assessment in Computational Biomechanics -- Robustness of Boolean Operations on Subdivision-Surface Models -- Towards the Development of an Interval Arithmetic Environment for Validated Computer-Aided Design and Verification of Systems in Control Engineering -- Distributed Bounded-Error Parameter and State Estimation in Networks of Sensors -- Error Bounds for Lanczos Approximations of Rational Functions of Matrices -- Linear Systems -- Error-Free Transformation in Rounding Mode toward Zero -- Fast (Parallel) Dense Linear System Solvers in C-XSC Using Error Free Transformations and BLAS -- A Note on Solving Problem 7 of the SIAM 100-Digit Challenge Using C-XSC.

This book constitutes the thoroughly refereed post-proceedings of the Dagstuhl Seminar 08021 on Numerical Validation in Current Hardware Architectures held at Dagstuhl Castle, Germany, in January 2008. The 16 revised full papers presented were selected during two rounds of reviewing and improvements. The papers are organized in topical sections on languages, software systems and tools, new verification techniques based on interval arithmetic, applications in science and engineering, and novel approaches to verification.

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