Logic synthesis and verification algorithms
By: Hachtel, Gary D.
Contributor(s): Somenzi, Fabio.
Material type:
Item type | Current location | Collection | Call number | Status | Date due | Barcode | Item holds |
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IIITD General Stacks | Electronics and Communication Engineering | 621.395 HAC-L (Browse shelf) | Available | 002498 |
Total holds: 0
Includes bibliographical references (p. 537-553) and index.
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