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Formal verification : an essential toolkit for modern VLSI design

By: Seligman, Erik.
Contributor(s): Schubert, Tom | Kumar, M. V. Achutha Kiran.
Material type: materialTypeLabelBookPublisher: Oxford : Elsevier, ©2015Description: xviii, 391 p. ; 23cm.ISBN: 9780128007273.Subject(s): Verilog | Electronic circuits testing | Electronic circuits testing | Electronic circuits
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Item type Current location Collection Call number Status Date due Barcode Item holds
Reference Reference IIITD
Electronics and Communication Engineering REF 621.3815 SEL-F (Browse shelf) Not For Loan 009798
Total holds: 0
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REF 621.3815 SAR-S Solid state microelectronic and optoelectronic devices REF 621.3815 SAU-F Fundamentals of tunnel field-effect transistors REF 621.3815 SED-M Laboratory explorations to accompany microelectronic circuits REF 621.3815 SEL-F Formal verification : REF 621.3815 TIE-E Electronic circuits : REF 621.3815 VIL-L Low power and low voltage circuit design with the FGMOS transistor REF 621.3815 WOL-S Student reference manual for electronic instrumentation laboratories

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