Algorithms and Architectures for Parallel Processing [electronic resource] :10th International Conference, ICA3PP 2010, Busan, Korea, May 21-23, 2010. Proceedings. Part I /
Contributor(s): Hsu, Ching-Hsien [editor.] | Yang, Laurence T [editor.] | Park, Jong Hyuk [editor.] | Yeo, Sang-Soo [editor.] | SpringerLink (Online service).Material type: BookSeries: Lecture Notes in Computer Science: 6081Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg, 2010.Description: XXIII, 574 p. online resource.Content type: text Media type: computer Carrier type: online resourceISBN: 9783642131196.Subject(s): Computer science | Architecture, Computer | Computer programming | Software engineering | Algorithms | Information storage and retrieval | Artificial intelligence | Computer Science | Algorithm Analysis and Problem Complexity | Computer System Implementation | Programming Techniques | Artificial Intelligence (incl. Robotics) | Software Engineering | Information Storage and RetrievalOnline resources: Click here to access online
Keynote Papers -- Efficient Web Browsing with Perfect Anonymity Using Page Prefetching -- InterCloud: Utility-Oriented Federation of Cloud Computing Environments for Scaling of Application Services -- Parallel Algorithms -- Scalable Co-clustering Algorithms -- Parallel Pattern Matching with Swaps on a Linear Array -- Parallel Prefix Computation in the Recursive Dual-Net -- A Two-Phase Differential Synchronization Algorithm for Remote Files -- A New Parallel Method of Smith-Waterman Algorithm on a Heterogeneous Platform -- Improved Genetic Algorithm for Minimizing Periodic Preventive Maintenance Costs in Series-Parallel Systems -- A New Hybrid Parallel Algorithm for MrBayes -- Research and Design of Deployment Framework for Blade-Based Data Center -- Query Optimization over Parallel Relational Data Warehouses in Distributed Environments by Simultaneous Fragmentation and Allocation -- Parallel Architectures -- Function Units Sharing between Neighbor Cores in CMP -- A High Efficient On-Chip Interconnection Network in SIMD CMPs -- Network-on-Chip Routing Algorithms by Breaking Cycles -- A Fair Thread-Aware Memory Scheduling Algorithm for Chip Multiprocessor -- Efficient Partitioning of Static Buses for Processor Arrays of Small Size -- Formal Proof for a General Architecture of Hybrid Prefix/Carry-Select Adders -- An Efficient Non-blocking Multithreaded Embedded System -- A Remote Mirroring Architecture with Adaptively Cooperative Pipelining -- SV: Enhancing SIMD Architectures via Combined SIMD-Vector Approach -- A Correlation-Aware Prefetching Strategy for Object-Based File System -- An Auxiliary Storage Subsystem to Distributed Computing Systems for External Storage Service -- Grid/Cluster Computing -- Checkpointing and Migration of Communication Channels in Heterogeneous Grid Environments -- On-Line Task Granularity Adaptation for Dynamic Grid Applications -- Message Clustering Technique towards Efficient Irregular Data Redistribution in Clusters and Grids -- Multithreading of Kostka Numbers Computation for the BonjourGrid Meta-desktop Grid Middleware -- Adaptable Scheduling Algorithm for Grids with Resource Redeployment Capability -- Using MPI on PC Cluster to Compute Eigenvalues of Hermitian Toeplitz Matrices -- Cloud Computing/Virtualization Techniques -- idsocket: API for Inter-domain Communications Base on Xen -- Strategy-Proof Dynamic Resource Pricing of Multiple Resource Types on Federated Clouds -- Adapting Market-Oriented Scheduling Policies for Cloud Computing -- A High Performance Inter-VM Network Communication Mechanism -- On the Effect of Using Third-Party Clouds for Maximizing Profit -- A Tracing Approach to Process Migration for Virtual Machine Based on Multicore Platform -- GPU Computing and Applications -- Accelerating Dock6’s Amber Scoring with Graphic Processing Unit -- Optimizing Sweep3D for Graphic Processor Unit -- Modular Resultant Algorithm for Graphics Processors -- A Novel Scheme for High Performance Finite-Difference Time-Domain (FDTD) Computations Based on GPU -- Parallel Programming, Performance Evaluation -- A Proposed Asynchronous Object Load Balancing Method for Parallel 3D Image Reconstruction Applications -- A Step-by-Step Extending Parallelism Approach for Enumeration of Combinatorial Objects -- A Study of Performance Scalability by Parallelizing Loop Iterations on Multi-core SMPs -- Impact of Multimedia Extensions for Different Processing Element Granularities on an Embedded Imaging System -- Fault-Tolerant/Information Security and Management -- Reducing False Aborts in STM Systems -- Fault-Tolerant Node-to-Set Disjoint-Path Routing in Hypercubes -- AirScope: A Micro-scale Urban Air Quality Management System -- Wireless Communication Network -- Design of a Slot Assignment Scheme for Link Error Distribution on Wireless Grid Networks -- Wireless Bluetooth Communications Combine with Secure Data Transmission Using ECDH and Conference Key Agreements -- Robust Multicast Scheme for Wireless Process Control on Traffic Light Networks -- A Note-Based Randomized and Distributed Protocol for Detecting Node Replication Attacks in Wireless Sensor Networks.
It is our great pleasure to welcome you to the proceedings of the 10th annual event of the International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP). ICA3PP is recognized as the main regular event covering the many dimensions of parallel algorithms and architectures, encompassing fundamental theoretical - proaches, practical experimental projects, and commercial components and systems. As applications of computing systems have permeated every aspect of daily life, the power of computing systems has become increasingly critical. Therefore, ICA3PP 2010 aimed to permit researchers and practitioners from industry to exchange inf- mation regarding advancements in the state of the art and practice of IT-driven s- vices and applications, as well as to identify emerging research topics and define the future directions of parallel processing. We received a total of 157 submissions this year, showing by both quantity and quality that ICA3PP is a premier conference on parallel processing. In the first stage, all papers submitted were screened for their relevance and general submission - quirements. These manuscripts then underwent a rigorous peer-review process with at least three reviewers per paper. In the end, 47 papers were accepted for presentation and included in the main proceedings, comprising a 30% acceptance rate.