CMOS SRAM circuit design and parametric test in nano-scaled technologies : process-aware SRAM design and test
By: Pavlov, Andrei.
Contributor(s): Sachdev, Manoj.
Material type:
Item type | Current location | Collection | Call number | Status | Date due | Barcode | Item holds |
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IIITD General Stacks | Electronics and Communication Engineering | 621.3815 PAV-C (Browse shelf) | Available | 009656 |
Total holds: 0
Includes bibliographical references and index.
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