Computer Aided Verification (Record no. 188576)

MARC details
000 -LEADER
fixed length control field 07007nam a22006135i 4500
001 - CONTROL NUMBER
control field 978-3-540-45047-4
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20240423132518.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 121227s2000 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9783540450474
-- 978-3-540-45047-4
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/10722167
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number QA76.758
072 #7 - SUBJECT CATEGORY CODE
Subject category code UMZ
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code COM051230
Source bisacsh
072 #7 - SUBJECT CATEGORY CODE
Subject category code UMZ
Source thema
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 005.1
Edition number 23
245 10 - TITLE STATEMENT
Title Computer Aided Verification
Medium [electronic resource] :
Remainder of title 12th International Conference, CAV 2000 Chicago, IL, USA, July 15-19, 2000 Proceedings /
Statement of responsibility, etc edited by E. Allen Emerson, A. Prasad Sistla.
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2000.
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg :
-- Imprint: Springer,
-- 2000.
300 ## - PHYSICAL DESCRIPTION
Extent X, 590 p.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
490 1# - SERIES STATEMENT
Series statement Lecture Notes in Computer Science,
International Standard Serial Number 1611-3349 ;
Volume number/sequential designation 1855
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Invited Talks and Tutorials -- Keynote Address: Abstraction, Composition, Symmetry, and a Little Deduction: The Remedies to State Explosion -- Invited Address: Applying Formal Methods to Cryptographic Protocol Analysis -- Invited Tutorial: Boolean Satisfiability Algorithms and Applications in Electronic Design Automation -- Invited Tutorial: Verification of Infinite-state and Parameterized Systems -- Regular Papers -- An Abstraction Algorithm for the Verification of Generalized C-Slow Designs -- Achieving Scalability in Parallel Reachability Analysis of Very Large Circuits -- An Automata-Theoretic Approach to Reasoning about Infinite-State Systems -- Automatic Verification of Parameterized Cache Coherence Protocols -- Binary Reachability Analysis of Discrete Pushdown Timed Automata -- Boolean Satisfiability with Transitivity Constraints -- Bounded Model Construction for Monadic Second-Order Logics -- Building Circuits from Relations -- Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking -- On the Completeness of Compositional Reasoning -- Counterexample-Guided Abstraction Refinement -- Decision Procedures for Inductive Boolean Functions Based on Alternating Automata -- Detecting Errors Before Reaching Them -- A Discrete Strategy Improvement Algorithm for Solving Parity Games -- Distributing Timed Model Checking — How the Search Order Matters -- Efficient Algorithms for Model Checking Pushdown Systems -- Efficient Büchi Automata from LTL Formulae -- Efficient Detection of Global Properties in Distributed Systems Using Partial-Order Methods -- Efficient Reachability Analysis of Hierarchical Reactive Machines -- Formal Verification of VLIW Microprocessors with Speculative Execution -- Induction in Compositional Model Checking -- Liveness and Acceleration in Parameterized Verification -- Mechanical Verification of an Ideal Incremental ABR Conformance Algorithm -- Model Checking Continuous-Time Markov Chains by Transient Analysis -- Model-Checking for Hybrid Systems by Quotienting and Constraints Solving -- Prioritized Traversal: Efficient Reachability Analysis for Verification and Falsification -- Regular Model Checking -- Symbolic Techniques for Parametric Reasoning about Counter and Clock Systems -- Syntactic Program Transformations for Automatic Abstraction -- Temporal-logic Queries -- Are Timed Automata Updatable? -- Tuning SAT Checkers for Bounded Model Checking -- Unfoldings of Unbounded Petri Nets -- Verification Diagrams Revisited: Disjunctive Invariants for Easy Verification -- Verifying Advanced Microarchitectures that Support Speculation and Exceptions -- Tool Papers -- FoCs – Automatic Generation of Simulation Checkers from Formal Specifications -- IF: A Validation Environment for Timed Asynchronous Systems -- Integrating WS1S with PVS -- PET: An Interactive Software Testing Tool -- A Proof-Carrying Code Architecture for Java -- The Statemate Verification Environment -- TAPS: A First-Order Verifier for Cryptographic Protocols -- VINAS-P: A Tool for TraceTheoretic Verification of Timed Asynchronous Circuits -- XMC: A Logic-Programming-Based Verification Toolset.
520 ## - SUMMARY, ETC.
Summary, etc This volume contains the proceedings of the 12th International Conference on Computer Aided Veri?cation (CAV 2000) held in Chicago, Illinois, USA during 15-19 July 2000. The CAV conferences are devoted to the advancement of the theory and practice of formal methods for hardware and software veri?cation. The con- rence covers the spectrum from theoretical foundations to concrete applications, with an emphasis on veri?cation algorithms, methods, and tools together with techniques for their implementation. The conference has traditionally drawn contributions from both researchers and practitioners in academia and industry. This year 91 regular research papers were submitted out of which 35 were - cepted, while 14 brief tool papers were submitted, out of which 9 were accepted for presentation. CAV included two invited talks and a panel discussion. CAV also included a tutorial day with two invited tutorials. Many industrial companies have shown a serious interest in CAV, ranging from usingthe presented technologies in their business to developing and m- keting their own formal veri?cation tools. We are very proud of the support we receive from industry. CAV 2000 was sponsored by a number of generous andforward-lookingcompaniesandorganizationsincluding:CadenceDesign- stems, IBM Research, Intel, Lucent Technologies, Mentor Graphics, the Minerva Center for Veri?cation of Reactive Systems, Siemens, and Synopsys. TheCAVconferencewasfoundedbyitsSteeringCommittee:EdmundClarke (CMU), Bob Kurshan (Bell Labs), Amir Pnueli (Weizmann), and Joseph Sifakis (Verimag).
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Software engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer science.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Machine theory.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computers, Special purpose.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Artificial intelligence.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Software Engineering.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Science Logic and Foundations of Programming.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Formal Languages and Automata Theory.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Special Purpose and Application-Based Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Artificial Intelligence.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Emerson, E. Allen.
Relator term editor.
Relator code edt
-- http://id.loc.gov/vocabulary/relators/edt
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Sistla, A. Prasad.
Relator term editor.
Relator code edt
-- http://id.loc.gov/vocabulary/relators/edt
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer Nature eBook
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9783540677703
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9783662186701
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Lecture Notes in Computer Science,
-- 1611-3349 ;
Volume number/sequential designation 1855
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier <a href="https://doi.org/10.1007/10722167">https://doi.org/10.1007/10722167</a>
912 ## -
-- ZDB-2-SCS
912 ## -
-- ZDB-2-SXCS
912 ## -
-- ZDB-2-LNC
912 ## -
-- ZDB-2-BAE
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks-CSE-Springer

No items available.

© 2024 IIIT-Delhi, library@iiitd.ac.in