Integrated Circuit and System Design (Record no. 187143)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 04692nam a22006615i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-540-30205-6 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240423130311.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 121227s2004 gw | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9783540302056 |
| -- | 978-3-540-30205-6 |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1007/b100662 |
| Source of number or code | doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7800-8360 |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TJF |
| Source | bicssc |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TEC008000 |
| Source | bisacsh |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | TJF |
| Source | thema |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.381 |
| Edition number | 23 |
| 245 10 - TITLE STATEMENT | |
| Title | Integrated Circuit and System Design |
| Medium | [electronic resource] : |
| Remainder of title | Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings / |
| Statement of responsibility, etc | edited by Enrico Macii, Vassilis Paliouras, Odysseas Koufopavlou. |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2004. |
| 264 #1 - | |
| -- | Berlin, Heidelberg : |
| -- | Springer Berlin Heidelberg : |
| -- | Imprint: Springer, |
| -- | 2004. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | XVI, 916 p. |
| Other physical details | online resource. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 490 1# - SERIES STATEMENT | |
| Series statement | Lecture Notes in Computer Science, |
| International Standard Serial Number | 1611-3349 ; |
| Volume number/sequential designation | 3254 |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Keynote Speech -- Invited Talks -- Embedded Tutorials -- Session 1: Buses and Communication -- Session 2: Circuits and Devices (I) -- Session 3: Low Power (I) -- Session 4: Architectures -- Session 5: Asynchronous Circuits -- Session 6: System Design -- Session 7: Circuits and Devices (II) -- Session 8: Interconnect and Physical Design -- Session 9: Security and Safety -- Session 10: Low Power (II) -- Session 11: Low-Power Processing (Poster) -- Session 12: Digital Design (Poster) -- Session 13: Modeling and Simulation (Poster). |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | WelcometotheproceedingsofPATMOS2004,thefourteenthinaseriesofint- national workshops. PATMOS 2004 was organized by the University of Patras with technical co-sponsorship from the IEEE Circuits and Systems Society. Over the years, the PATMOS meeting has evolved into an important - ropean event, where industry and academia meet to discuss power and timing aspects in modern integrated circuit and system design. PATMOS provides a forum for researchers to discuss and investigate the emerging challenges in - sign methodologies and tools required to develop the upcoming generations of integrated circuits and systems. We realized this vision this year by providing a technical program that contained state-of-the-art technical contributions, a keynote speech, three invited talks and two embedded tutorials. The technical program focused on timing, performance and power consumption, as well as architectural aspects, with particular emphasis on modelling, design, charac- rization, analysis and optimization in the nanometer era. This year a record 152 contributions were received to be considered for p- sible presentation at PATMOS. Despite the choice for an intense three-day m- ting, only 51 lecture papers and 34 poster papers could be accommodated in the single-track technical program. The Technical Program Committee, with the - sistance of additional expert reviewers, selected the 85 papers to be presented at PATMOS and organized them into 13 technical sessions. As was the case with the PATMOS workshops, the review process was anonymous, full papers were required, and several reviews were received per manuscript. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Electronics. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer science. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Logic design. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computers. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Microprocessors. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer architecture. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer arithmetic and logic units. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Electronics and Microelectronics, Instrumentation. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Theory of Computation. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Logic Design. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Hardware Performance and Reliability. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Processor Architectures. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Arithmetic and Logic Structures. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Macii, Enrico. |
| Relator term | editor. |
| Relator code | edt |
| -- | http://id.loc.gov/vocabulary/relators/edt |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Paliouras, Vassilis. |
| Relator term | editor. |
| Relator code | edt |
| -- | http://id.loc.gov/vocabulary/relators/edt |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Koufopavlou, Odysseas. |
| Relator term | editor. |
| Relator code | edt |
| -- | http://id.loc.gov/vocabulary/relators/edt |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY | |
| Title | Springer Nature eBook |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9783540230953 |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9783662169407 |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| Uniform title | Lecture Notes in Computer Science, |
| -- | 1611-3349 ; |
| Volume number/sequential designation | 3254 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | <a href="https://doi.org/10.1007/b100662">https://doi.org/10.1007/b100662</a> |
| 912 ## - | |
| -- | ZDB-2-SCS |
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| -- | ZDB-2-LNC |
| 912 ## - | |
| -- | ZDB-2-BAE |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks-CSE-Springer |
No items available.