FEEDBACK Smiley face

Reconfigurable Computing: Architectures, Tools and Applications (Record no. 18489)

000 -LEADER
fixed length control field 06616nam a22006255i 4500
001 - CONTROL NUMBER
control field 978-3-642-00641-8
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20170515111703.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 100301s2009 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9783642006418
-- 978-3-642-00641-8
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-3-642-00641-8
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number QA75.5-76.95
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7885-7895
072 #7 - SUBJECT CATEGORY CODE
Subject category code UK
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code COM067000
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004
Edition number 23
245 10 - TITLE STATEMENT
Title Reconfigurable Computing: Architectures, Tools and Applications
Medium [electronic resource] :
Remainder of title 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings /
Statement of responsibility, etc edited by Jürgen Becker, Roger Woods, Peter Athanas, Fearghal Morgan.
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg :
-- Imprint: Springer,
-- 2009.
300 ## - PHYSICAL DESCRIPTION
Extent XV, 388 p.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
337 ## -
-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
490 1# - SERIES STATEMENT
Series statement Lecture Notes in Computer Science,
International Standard Serial Number 0302-9743 ;
Volume number/sequential designation 5453
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Keynotes -- FPGA Design Productivity – A Discussion of the State of the Art and a Research Agenda -- Resiliency in Elemental Computing -- The Colour of Embedded Computation -- Applications 1 -- A HyperTransport 3 Physical Layer Interface for FPGAs -- Parametric Design for Reconfigurable Software-Defined Radio -- Applications 2 -- Hardware/Software FPGA Architecture for Robotics Applications -- Reconfigurable Operator Based Multimedia Embedded Processor -- FPGA Security and Bitstream Analysis -- A Protocol for Secure Remote Updates of FPGA Configurations -- FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing -- Fault Tolerant Systems -- An Efficient and Low-Cost Design Methodology to Improve SRAM-Based FPGA Robustness in Space and Avionics Applications -- Timing Driven Placement for Fault Tolerant Circuits Implemented on SRAM-Based FPGAs -- Architectures -- A Novel Local Interconnect Architecture for Variable Grain Logic Cell -- Dynamically Adapted Low Power ASIPs -- Fast Optical Reconfiguration of a Nine-Context DORGA -- Place and Route Techniques -- Heterogeneous Architecture Exploration: Analysis vs. Parameter Sweep -- On Simplifying Placement and Routing by Extending Coarse-Grained Reconfigurable Arrays with Omega Networks -- A New Datapath Merging Method for Reconfigurable System -- Cryptography -- Optimizing the Control Hierarchy of an ECC Coprocessor Design on an FPGA Based SoC Platform -- Fully Pipelined Hardware Implementation of 128-Bit SEED Block Cipher Algorithm -- Improving Throughput of AES-GCM with Pipelined Karatsuba Multipliers on FPGAs -- Resource Allocation and Scheduling -- Compiling Techniques for Coarse Grained Runtime Reconfigurable Architectures -- Online Task Scheduling for the FPGA-Based Partially Reconfigurable Systems -- Applications 3 -- Word-Length Optimization and Error Analysis of a Multivariate Gaussian Random Number Generator -- FPGA-Based Anomalous Trajectory Detection Using SOFM -- Posters -- SORU: A Reconfigurable Vector Unit for Adaptable Embedded Systems -- A Parallel Branching Program Machine for Emulation of Sequential Circuits -- Memory Sharing Approach for TMR Softcore Processor -- The Need for Reconfigurable Routers in Networks-on-Chip -- Transparent Dynamic Reconfiguration as a Service of a System-Level Middleware -- Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder -- Tile-Based Fault Tolerant Approach Using Partial Reconfiguration -- Regular Expression Pattern Matching Supporting Constrained Repetitions -- Accelerating Calculations on the RASC Platform: A Case Study of the Exponential Function -- AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications -- CCproc: A Custom VLIW Cryptography Co-processor for Symmetric-Key Ciphers -- Object Tracking and Motion Capturing in Hardware-Accelerated Multi-camera System -- Implementation of the AES Algorithm for a Reconfigurable, Bit Serial, Fully Pipelined Architecture -- A Hardware Accelerated Simulation Environment for Spiking Neural Networks -- Survey of Advanced CABAC Accelerator Architectures for Future Multimedia -- Real Time Simulation in Floating Point Precision Using FPGA Computing -- A Hardware Analysis of Twisted Edwards Curves for an Elliptic Curve Cryptosystem -- A Seamless Virtualization Approach for Transparent Dynamical Function Mapping Targeting Heterogeneous and Reconfigurable Systems -- Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator -- ACCFS – Operating System Integration of Computational Accelerators Using a VFS Approach -- A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms.
520 ## - SUMMARY, ETC.
Summary, etc This book constitutes the refereed proceedings of the 5th International Workshop on Applied Reconfigurable Computing, ARC 2009, held in Karlsruhe, Germany, in March 2009. The 21 full papers and 21 short papers presented together with the abstracts of 3 keynote lectures were carefully reviewed and selected from about 100 submissions. The papers are organized in topical sections on FPGA security and bitstream analysis, fault tolerant systems, architectures, place and route techniques, cryptography, and resource allocation and scheduling, as well as on applications.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer science.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer hardware.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer communication systems.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer system failures.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Architecture, Computer.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Image processing.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Science.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Hardware.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Communication Networks.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element System Performance and Evaluation.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer System Implementation.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Image Processing and Computer Vision.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Becker, Jürgen.
Relator term editor.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Woods, Roger.
Relator term editor.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Athanas, Peter.
Relator term editor.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Morgan, Fearghal.
Relator term editor.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9783642006401
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Lecture Notes in Computer Science,
-- 0302-9743 ;
Volume number/sequential designation 5453
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/978-3-642-00641-8
912 ## -
-- ZDB-2-SCS
912 ## -
-- ZDB-2-LNC
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type e-Book

No items available.


© IIIT-Delhi, 2013 | Phone: +91-11-26907510| FAX +91-11-26907405 | E-mail: library@iiitd.ac.in