Behavioral Synthesis for Hardware Security (Record no. 179256)

MARC details
000 -LEADER
fixed length control field 03942nam a22005415i 4500
001 - CONTROL NUMBER
control field 978-3-030-78841-4
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20240423125545.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
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fixed length control field 220208s2022 sz | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9783030788414
-- 978-3-030-78841-4
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/978-3-030-78841-4
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7867-7867.5
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFC
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code TEC008010
Source bisacsh
072 #7 - SUBJECT CATEGORY CODE
Subject category code TJFC
Source thema
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
Edition number 23
245 10 - TITLE STATEMENT
Title Behavioral Synthesis for Hardware Security
Medium [electronic resource] /
Statement of responsibility, etc edited by Srinivas Katkoori, Sheikh Ariful Islam.
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2022.
264 #1 -
-- Cham :
-- Springer International Publishing :
-- Imprint: Springer,
-- 2022.
300 ## - PHYSICAL DESCRIPTION
Extent XV, 398 p. 154 illus., 118 illus. in color.
Other physical details online resource.
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-- computer
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-- online resource
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505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Introduction -- Background -- Techniques for algorithm-level obfuscation during high-level synthesis -- High-level synthesis of key based obfuscated RTL datapaths -- RTL Hardware IP protection Using Key-Based Control and Data Flow Obfuscation -- Empirical Word-Level Analysis of Arithmetic Module Architectures for Hardware Trojan Susceptibility -- Behavioral synthesis techniques for intellectual property protection -- Exploring Low Cost Optimal Watermark for Reusable IP Cores During High Level Synthesis -- High-Level Synthesis for Side-Channel Defense -- On state encoding against power analysis attacks for finite state controllers -- Examining the consequences of high-level synthesis optimizations on power side-channel -- Towards a timing attack aware high-level synthesis of integrated circuits -- High-Level Synthesis with Timing-Sensitive Information Flow Enforcement -- Mitigating information leakage during critical communication using S*FSM -- Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPsThrough Security-Driven Task Scheduling -- Securing industrial control system with high level synthesis -- Conclusions and open research problems.
520 ## - SUMMARY, ETC.
Summary, etc This book presents state-of-the-art research results from leading electronic design automation (EDA) researchers on automated approaches for generating cyber-secure, smart hardware. The authors first provide brief background on high-level synthesis principles and motivate the need for secure design during behavioral synthesis. Then they provide readers with synthesis techniques for six automated security solutions, namely, hardware obfuscation, hardware Trojan detection, IP watermarking, state encoding, side channel attack resistance, and information flow tracking. Provides a single-source reference to behavioral synthesis for hardware security; Describes automatic synthesis techniques for algorithmic obfuscation, using code transformations; Includes behavioral synthesis techniques for intellectual property protection.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Cooperating objects (Computer systems).
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer architecture.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Cyber-Physical Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Processor Architectures.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Katkoori, Srinivas.
Relator term editor.
Relator code edt
-- http://id.loc.gov/vocabulary/relators/edt
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Islam, Sheikh Ariful.
Relator term editor.
Relator code edt
-- http://id.loc.gov/vocabulary/relators/edt
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer Nature eBook
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9783030788407
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9783030788421
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9783030788438
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier <a href="https://doi.org/10.1007/978-3-030-78841-4">https://doi.org/10.1007/978-3-030-78841-4</a>
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942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks-CSE-Springer

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