Architecture of Computing Systems -- ARCS 2016 (Record no. 177546)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 06314nam a22006735i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-319-30695-7 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | DE-He213 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240423125412.0 |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr nn 008mamaa |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 160330s2016 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9783319306957 |
| -- | 978-3-319-30695-7 |
| 024 7# - OTHER STANDARD IDENTIFIER | |
| Standard number or code | 10.1007/978-3-319-30695-7 |
| Source of number or code | doi |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK5105.5-5105.9 |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | UKN |
| Source | bicssc |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | COM043000 |
| Source | bisacsh |
| 072 #7 - SUBJECT CATEGORY CODE | |
| Subject category code | UKN |
| Source | thema |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 004.6 |
| Edition number | 23 |
| 245 10 - TITLE STATEMENT | |
| Title | Architecture of Computing Systems -- ARCS 2016 |
| Medium | [electronic resource] : |
| Remainder of title | 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings / |
| Statement of responsibility, etc | edited by Frank Hannig, João M.P. Cardoso, Thilo Pionteck, Dietmar Fey, Wolfgang Schröder-Preikschat, Jürgen Teich. |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2016. |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2016. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | XX, 402 p. 164 illus. |
| Other physical details | online resource. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 490 1# - SERIES STATEMENT | |
| Series statement | Theoretical Computer Science and General Issues, |
| International Standard Serial Number | 2512-2029 ; |
| Volume number/sequential designation | 9637 |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Configurable and In-Memory Accelerators -- Towards Multicore Performance with Configurable Computing Units -- Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube -- Network-on-Chip and Secure Computing Architectures -- CASCADE: Congestion Aware Switchable Cycle Adaptive Detection Router -- An Alternating Transmission Scheme for Detection Routing based Network-on-Chips -- Exzess: Hardware-based RAM Encryption against Physical Memory Disclosure -- Hardware-Assisted Context Management for Accelerator Virtualization: A Case Study with RSA -- Cache Architectures and Protocols Adaptive Cache Structures -- Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence -- Mapping of Applications on Heterogeneous -- Architectures and Real-Time Tasks on Multiprocessors Generic algorithmic scheme for 2D stencil applications on heterogeneous hybrid machines -- GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing -- Task Variants with Different Scratchpad Memory Consumption in Multi-Task Environments -- Feedback-Based Admission Control for Hard Real-Time Task Allocation under Dynamic Workload on Many-core Systems -- All About Time: Timing, Tracing, and Performance Modeling Data Age Diminution in the Logical Execution Time Model -- Accurate Sample Time Reconstruction for Sensor Data Synchronization -- DiaSys: On-Chip Trace Analysis for Multi-Processor System-on-Chip -- Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks -- Measurement-Based Probabilistic Timing Analysis for Graphics Processor Units -- Approximate and Energy-Efficient Computing -- Reducing Energy Consumption of Data Transfers using Runtime Data Type Conversion -- Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector -- Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-based Modeling -- Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting -- Allocation: From Memories to FPGA Hardware Modules Reducing NoC and Memory Contention for Manycores -- An Efficient Data Structure for Dynamic Two-Dimensional Reconfiguration -- Organic Computing Systems Runtime Clustering of Similarly Behaving Agents in Open Organic Computing Systems -- Comparison of Dependency Measures for the Detection of Mutual Influences in Organic Computing Systems -- Augmenting the Algorithmic Structure of XCS by Means of Interpolation -- Reliability Aspects in NoCs, Caches, and GPUs Estimation of End-to-end Packet Error Rates for NoC Multicasts -- Protecting Code Regions on Asymmetrically Reliable Caches -- A New Simulation-based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book constitutes the proceedings of the 29th International Conference on Architecture of Computing Systems, ARCS 2016, held in Nuremberg, Germany, in April 2016. The 29 full papers presented in this volume were carefully reviewed and selected from 87 submissions. They were organized in topical sections named: configurable and in-memory accelerators; network-on-chip and secure computing architectures; cache architectures and protocols; mapping of applications on heterogeneous architectures and real-time tasks on multiprocessors; all about time: timing, tracing, and performance modeling; approximate and energy-efficient computing; allocation: from memories to FPGA hardware modules; organic computing systems; and reliability aspects in NoCs, caches, and GPUs. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer networks . |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer systems. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Algorithms. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Software engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Application software. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer science. |
| 650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer Communication Networks. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer System Implementation. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Algorithms. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Software Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer and Information Systems Applications. |
| 650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Theory of Computation. |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Hannig, Frank. |
| Relator term | editor. |
| Relator code | edt |
| -- | http://id.loc.gov/vocabulary/relators/edt |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Cardoso, João M.P. |
| Relator term | editor. |
| Relator code | edt |
| -- | http://id.loc.gov/vocabulary/relators/edt |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Pionteck, Thilo. |
| Relator term | editor. |
| Relator code | edt |
| -- | http://id.loc.gov/vocabulary/relators/edt |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Fey, Dietmar. |
| Relator term | editor. |
| Relator code | edt |
| -- | http://id.loc.gov/vocabulary/relators/edt |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Schröder-Preikschat, Wolfgang. |
| Relator term | editor. |
| Relator code | edt |
| -- | http://id.loc.gov/vocabulary/relators/edt |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Teich, Jürgen. |
| Relator term | editor. |
| Relator code | edt |
| -- | http://id.loc.gov/vocabulary/relators/edt |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | SpringerLink (Online service) |
| 773 0# - HOST ITEM ENTRY | |
| Title | Springer Nature eBook |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9783319306940 |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Printed edition: |
| International Standard Book Number | 9783319306964 |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| Uniform title | Theoretical Computer Science and General Issues, |
| -- | 2512-2029 ; |
| Volume number/sequential designation | 9637 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | <a href="https://doi.org/10.1007/978-3-319-30695-7">https://doi.org/10.1007/978-3-319-30695-7</a> |
| 912 ## - | |
| -- | ZDB-2-SCS |
| 912 ## - | |
| -- | ZDB-2-SXCS |
| 912 ## - | |
| -- | ZDB-2-LNC |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks-CSE-Springer |
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