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Cryptographic Hardware and Embedded Systems - CHES 2006 (Record no. 17289)

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001 - CONTROL NUMBER
control field 978-3-540-46561-4
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20170515111628.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
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020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9783540465614
-- 978-3-540-46561-4
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/11894063
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number QA76.9.A25
072 #7 - SUBJECT CATEGORY CODE
Subject category code URY
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code COM053000
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 005.82
Edition number 23
245 10 - TITLE STATEMENT
Title Cryptographic Hardware and Embedded Systems - CHES 2006
Medium [electronic resource] :
Remainder of title 8th International Workshop, Yokohama, Japan, October 10-13, 2006. Proceedings /
Statement of responsibility, etc edited by Louis Goubin, Mitsuru Matsui.
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg,
-- 2006.
300 ## - PHYSICAL DESCRIPTION
Extent XII, 462 p.
Other physical details online resource.
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-- text
-- txt
-- rdacontent
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-- computer
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-- rdamedia
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-- online resource
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-- rdacarrier
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-- text file
-- PDF
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490 1# - SERIES STATEMENT
Series statement Lecture Notes in Computer Science,
International Standard Serial Number 0302-9743 ;
Volume number/sequential designation 4249
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Side Channels I -- Template Attacks in Principal Subspaces -- Templates vs. Stochastic Methods -- Towards Security Limits in Side-Channel Attacks -- Low Resources -- HIGHT: A New Block Cipher Suitable for Low-Resource Device -- Invited Talk I -- Integer Factoring Utilizing PC Cluster -- Hardware Attacks and Countermeasures I -- Optically Enhanced Position-Locked Power Analysis -- Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations -- A Generalized Method of Differential Fault Attack Against AES Cryptosystem -- Special Purpose Hardware -- Breaking Ciphers with COPACOBANA –A Cost-Optimized Parallel Code Breaker -- Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware -- Efficient Algorithms for Embedded Processors -- Implementing Cryptographic Pairings on Smartcards -- SPA-Resistant Scalar Multiplication on Hyperelliptic Curve Cryptosystems Combining Divisor Decomposition Technique and Joint Regular Form -- Fast Generation of Prime Numbers on Portable Devices: An Update -- Side Channels II -- A Proposition for Correlation Power Analysis Enhancement -- High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching -- Cache-Collision Timing Attacks Against AES -- Provably Secure S-Box Implementation Based on Fourier Transform -- Invited Talk II -- The Outer Limits of RFID Security -- Hardware Attacks and Countermeasures II -- Three-Phase Dual-Rail Pre-charge Logic -- Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage -- Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style -- Efficient Hardware I -- Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors -- NanoCMOS-Molecular Realization of Rijndael -- Improving SHA-2 Hardware Implementations -- Trusted Computing -- Offline Hardware/Software Authentication for Reconfigurable Platforms -- Side Channels III -- Why One Should Also Secure RSA Public Key Elements -- Power Attack on Small RSA Public Exponent -- Unified Point Addition Formulæ and Side-Channel Attacks -- Hardware Attacks and Countermeasures III -- Read-Proof Hardware from Protective Coatings -- Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits -- Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks -- Invited Talk III -- Challenges for Trusted Computing -- Efficient Hardware II -- Superscalar Coprocessor for High-Speed Curve-Based Cryptography -- Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller -- FPGA Implementation of Point Multiplication on Koblitz Curves Using Kleinian Integers.
520 ## - SUMMARY, ETC.
Summary, etc These are the proceedings of the Eighth Workshop on Cryptographic Hardware and Embedded Systems (CHES 2006) held in Yokohama, Japan, October 10-13, 2006. The CHES workshophas been sponsored by the International Association for Cryptographic Research (IACR) since 2004. The ?rst and the second CHES workshops were held in Worcester in 1999 and 2000, respectively, followed by Paris in 2001, San Francisco Bay Area in 2002, Cologne in 2003, Boston in 2004 and Edinburgh in 2005. This is the ?rst CHES workshop held in Asia. This year,a totalof 112 paper submissionswerereceived.The reviewprocess was therefore a delicate and challenging task for the Program Committee m- bers. Each paper was carefully read by at least three reviewers, and submissions with a Program Committee member as a (co-)author by at least ?ve reviewers. The review process concluded with a two week Web discussion process which resulted in 32 papers being selected for presentation. Unfortunately, there were a number of good papers that could not be included in the program due to a lack of space. We would like to thank all the authors who submitted papers to CHES 2006. In addition to regular presentations, we were very fortunate to have in the programthreeexcellentinvitedtalksgivenbyKazumaroAoki(NTT)on“Integer Factoring Utilizing PC Cluster,” Ari Juels (RSA Labs) on “The Outer Limits of RFID Security” and Ahmad Sadeghi (Ruhr University Bochum) on “Challenges for Trusted Computing.” The program also included a rump session, chaired by Christof Paar, featuring informal presentations on recent results.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer science.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Logic design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer communication systems.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Special purpose computers.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Operating systems (Computers).
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Data encryption (Computer science).
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Management information systems.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Science.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Data Encryption.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Communication Networks.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Special Purpose and Application-Based Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Logic Design.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Operating Systems.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Management of Computing and Information Systems.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Goubin, Louis.
Relator term editor.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Matsui, Mitsuru.
Relator term editor.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9783540465591
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Lecture Notes in Computer Science,
-- 0302-9743 ;
Volume number/sequential designation 4249
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/11894063
912 ## -
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912 ## -
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942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type e-Book

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