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Parallel Computer Routing and Communication (Record no. 14570)

000 -LEADER
fixed length control field 05624nam a22005775i 4500
001 - CONTROL NUMBER
control field 978-3-540-69352-9
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20170515111459.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
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fixed length control field 121227s1998 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9783540693529
-- 978-3-540-69352-9
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/3-540-69352-1
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK5105.5-5105.9
072 #7 - SUBJECT CATEGORY CODE
Subject category code UKN
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code COM075000
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004.6
Edition number 23
245 10 - TITLE STATEMENT
Title Parallel Computer Routing and Communication
Medium [electronic resource] :
Remainder of title Second International Workshop, PCRCW’97 Atlanta, Georgia, USA, June 26–27, 1997 Proceedings /
Statement of responsibility, etc edited by Sudhakar Yalamanchili, José Duato.
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg,
-- 1998.
300 ## - PHYSICAL DESCRIPTION
Extent XII, 309 p.
Other physical details online resource.
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-- computer
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-- online resource
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490 1# - SERIES STATEMENT
Series statement Lecture Notes in Computer Science,
International Standard Serial Number 0302-9743 ;
Volume number/sequential designation 1417
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Keynote Address -- Approaches to Quality of Service in High-Performance Networks -- Routing I -- Integrated Multi-class Routing -- Congestion Control in the Wormhole-Routed Torus With Clustering and Delayed Deflection -- Multicasting in Irregular Networks with Cut-Through Switches using Tree-Based Multidestination Worms* -- Poster Session -- CCSIMD: a Concurrent Communication and Computation Framework for SIMD Machines -- Arctic Switch Fabric -- Router and Network Architectures I -- STREAMER: Hardware Support for Smoothed Transmission of Stored Video over ATM -- Preliminary Evaluation of a Hybrid Deterministic/Adaptive Router -- HiPER-P: An Efficient, High-Performance Router for Multicomputer Interconnection Networks -- Router and Network Architectures II (Invited Presentations) -- ServerNet™ II -- Embedded Systems Standards -- Challenges in the Design of Contemporary Routers -- Panel Session -- Panel Session -- Messaging Layer Support -- Evaluation of Communication Mechanisms in Invalidate-based Shared Memory Multiprocessors -- How Can We Design Better Networks for DSM Systems? -- Integration of U-Net into Windows/NT -- Routing II -- Distance-Based Flow Control in Wormhole Networks -- On the Use of Virtual Channels in Networks of Workstations with Irregular Topology -- Multicasting on Switch-based Irregular Networks using Multi-drop Path-based Multidestination Worms -- Power/Performance Trade-offs for Direct Networks -- Router and Network Architectures III -- ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing -- Does Time-Division Multiplexing Close the Gap Between Memory and Optical Communication Speeds? -- Deadlock Issues -- Modeling Message Blocking and Deadlock in Interconnection Networks -- On the Reduction of Deadlock Frequency by Limiting Message Injection in Wormhole Networks.
520 ## - SUMMARY, ETC.
Summary, etc This workshop was a continuation of the PCRCW ’94 workshop that focused on issues in parallel communication and routing in support of parallel processing. The workshop series provides a forum for researchers and designers to exchange ideas with respect to challenges and issues in supporting communication for high-performance parallel computing. Within the last few years we have seen the scope of interconnection network technology expand beyond traditional multiprocessor systems to include high-availability clusters and the emerging class of system area networks. New application domains are creating new requirements for interconnection network services, e.g., real-time video, on-line data mining, etc. The emergence of quality-of-service guarantees within these domains challenges existing approaches to interconnection network design. In the recent past we have seen the emphasis on low-latency software layers, the application of multicomputer interconnection technology to distributed shared-memory multiprocessors and LAN interconnects, and the shift toward the use of commodity clusters and standard components. There is a continuing evolution toward powerful and inexpensive network interfaces, and low-cost, high-speed routers and switches from commercial vendors. The goal is to address the above issues in the context of networks of workstations, multicomputers, distributed shared-memory multiprocessors, and traditional tightly-coupled multiprocessor interconnects. The PCRCW ’97 workshop presented 20 regular papers and two short papers covering a range of topics dealing with modern interconnection networks. It was hosted by the Georgia Institute of Technology and sponsored by the Atlanta Chapter of the IEEE Computer Society.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer science.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer memory systems.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Microprocessors.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer communication systems.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer system failures.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Algorithms.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Science.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Communication Networks.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Processor Architectures.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Memory Structures.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element System Performance and Evaluation.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Algorithm Analysis and Problem Complexity.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Yalamanchili, Sudhakar.
Relator term editor.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Duato, José.
Relator term editor.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9783540645719
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Lecture Notes in Computer Science,
-- 0302-9743 ;
Volume number/sequential designation 1417
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/3-540-69352-1
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942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type e-Book

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