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Field-Programmable Logic and Applications (Record no. 14371)

000 -LEADER
fixed length control field 06219nam a22006135i 4500
001 - CONTROL NUMBER
control field 978-3-540-69557-8
003 - CONTROL NUMBER IDENTIFIER
control field DE-He213
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20170515111448.0
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr nn 008mamaa
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 121227s1997 gw | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9783540695578
-- 978-3-540-69557-8
024 7# - OTHER STANDARD IDENTIFIER
Standard number or code 10.1007/3-540-63465-7
Source of number or code doi
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7885-7895
072 #7 - SUBJECT CATEGORY CODE
Subject category code UY
Source bicssc
072 #7 - SUBJECT CATEGORY CODE
Subject category code COM059000
Source bisacsh
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.39
Edition number 23
245 10 - TITLE STATEMENT
Title Field-Programmable Logic and Applications
Medium [electronic resource] :
Remainder of title 7th International Workshop, FPL '97 London, UK, September 1–3, 1997 Proceedings /
Statement of responsibility, etc edited by Wayne Luk, Peter Y. K. Cheung, Manfred Glesner.
264 #1 -
-- Berlin, Heidelberg :
-- Springer Berlin Heidelberg,
-- 1997.
300 ## - PHYSICAL DESCRIPTION
Extent XII, 512 p.
Other physical details online resource.
336 ## -
-- text
-- txt
-- rdacontent
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-- computer
-- c
-- rdamedia
338 ## -
-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
490 1# - SERIES STATEMENT
Series statement Lecture Notes in Computer Science,
International Standard Serial Number 0302-9743 ;
Volume number/sequential designation 1304
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Multicontext dynamic reconfiguration and real-time probing on a novel mixed signal programmable device with on-chip microprocessor -- CAD-oriented FPGA and dedicated CAD system for telecommunications -- Rothko: A three dimensional FPGA architecture, its fabrication, and design tools -- Extending dynamic circuit switching to meet the challenges of new FPGA architectures -- Performance evaluation of a full speed PCI initiator and target subsystem using FPGAs -- Implementation of pipelined multipliers on Xilinx FPGAs -- The XC620ODS development system -- Thermal monitoring on FPGAs using ring-oscillators -- A reconfigurable approach to low cost media processing -- Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research -- Stream synthesis for a wormhole run-time reconfigurable platform -- Pipeline morphing and virtual pipelines -- Parallel graph colouring using FPGAs -- Run-time compaction of FPGA designs -- Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement -- A case study of partially evaluated hardware circuits: Key-specific DES -- Run-time parameterised circuits for the Xilinx XC6200 -- Automatic identification of swappable logic units in XC6200 circuitry -- Towards an expert system for a priori estimation of reconfiguration latency in dynamically reconfigurable logic -- Exploiting reconfigurability through domain-specific systems -- Technology mapping by binate covering -- VPR: a new packing, placement and routing tool for FPGA research -- Technology mapping of heterogeneous LUT-based FPGAs -- Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs -- Technology mapping of LUT based FPGAs for delay optimisation -- Automatic Mapping of Algorithms onto multiple FPGA-SRAM Modules -- FPLD HDL synthesis employing high-level evolutionary algorithm optimisation -- An hardware/software partitioning algorithm for custom computing machines -- The Java Environment for Reconfigurable Computing -- Data scheduling to increase performance of parallel accelerators -- An operating system for custom computing machines based on the Xputer paradigm -- Fast parallel implementation of DFT using configurable devices -- Enhancing fixed point DSP processor performance by adding CPLD's as coprocessing elements -- A case study of algorithm implementation in reconfigurable hardware and software -- A reconfigurable data-localised array for morphological algorithms -- Virtual radix array processors (V-RaAP) -- An FPGA implementation of a matched filter detector for spread spectrum communications systems -- An NTSC and PAL closed caption processor -- A 800Mpixel/sec reconfigurable image correlator on XC6216 -- A reconfigurable coprocessor for a PCI-based real time computer vision system -- Real-time stereopsis using FPGAs -- FPGAs Implementation of a digital IQ demodulator using VHDL -- Hardware compilation, configurable platforms and ASICs for self-validating sensors -- PostScript™ rendering with virtual hardware -- P4: A platform for FPGA implementation of protocol boosters -- Satisfiability on reconfigurable hardware -- Auto-configurable array for GCD computation -- Structural versus algorithmic approaches for efficient adders on xilinx 5200 FPGA -- FPGA implementation of real-time digital controllers using on-line arithmetic -- A prototyping environment for fuzzy controllers -- A reconfigurable sensor-data processing system for personal robots.
520 ## - SUMMARY, ETC.
Summary, etc This book constitutes the refereed proceedings of the 7th International Workshop on Field Programmable Logic and Applications, FPL '97, held in London, UK, in September 1997. The 51 revised full papers in the volume were carefully selected from a large number of high-quality papers. The book is divided into sections on devices and architectures, devices and systems, reconfiguration, design tools, custom computing and codesign, signal processing, image and video processing, sensors and graphics, color and robotics, and applications.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer science.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer hardware.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Architecture, Computer.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Programming languages (Electronic computers).
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Mathematical logic.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer engineering.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Complexity, Computational.
650 14 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Science.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Engineering.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer System Implementation.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Programming Languages, Compilers, Interpreters.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Hardware.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Complexity.
650 24 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Mathematical Logic and Formal Languages.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Luk, Wayne.
Relator term editor.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Cheung, Peter Y. K.
Relator term editor.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Glesner, Manfred.
Relator term editor.
710 2# - ADDED ENTRY--CORPORATE NAME
Corporate name or jurisdiction name as entry element SpringerLink (Online service)
773 0# - HOST ITEM ENTRY
Title Springer eBooks
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Printed edition:
International Standard Book Number 9783540634652
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Lecture Notes in Computer Science,
-- 0302-9743 ;
Volume number/sequential designation 1304
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://dx.doi.org/10.1007/3-540-63465-7
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942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Koha item type e-Book

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