FEEDBACK Smiley face
Power-Aware Computer Systems Second International Workshop, PACS 2002 Cambridge, MA, USA, February 2, 2002 Revised Papers / [electronic resource] : edited by Babak Falsafi, T. N. Vijaykumar. - X, 226 p. online resource. - Lecture Notes in Computer Science, 2325 0302-9743 ; . - Lecture Notes in Computer Science, 2325 .

Power-Aware Architecture/Microarchitecture -- Early-Stage Definition of LPX: A Low Power Issue-Execute Processor -- Dynamic Tag-Check Omission: A Low Power Instruction Cache Architecture Exploiting Execution Footprints -- A Hardware Architecture for Dynamic Performance and Energy Adaptation -- Multi-Processor Computer System Having Low Power Consumption -- Power-Aware Real-Time Systems -- An Integrated Heuristic Approach to Power-Aware Real-Time Scheduling -- Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources -- A Low-Power Content-Adaptive Texture Mapping Architecture for Real-Time 3D Graphics -- Power Modeling and Monitoring -- Energy-Driven Statistical Sampling: Detecting Software Hotspots -- Modeling of DRAM Power Control Policies Using Deterministic and Stochastic Petri Nets -- SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms -- Power-Aware OS and Compilers -- Application-Supported Device Management for Energy and Performance -- Energy-Efficient Server Clusters -- Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches.


10.1007/3-540-36612-1 doi

Computer hardware.
Computer organization.
Architecture, Computer.
Operating systems (Computers).
Electrical engineering.
Electronics and Microelectronics, Instrumentation.
Computer System Implementation.
Computer Systems Organization and Communication Networks.
Computer Hardware.
Operating Systems.
Electrical Engineering.

TK7800-8360 TK7874-7874.9


© IIIT-Delhi, 2013 | Phone: +91-11-26907510| FAX +91-11-26907405 | E-mail: