CMOS SRAM circuit design and parametric test in nano-scaled technologies :

Pavlov, Andrei

CMOS SRAM circuit design and parametric test in nano-scaled technologies : process-aware SRAM design and test Andrei Pavlov, Manoj Sachdev. - New Delhi : Springer, ©2008. - xvi, 193 p. : ill. ; 25 cm. - Frontiers in electronic testing ; 40 .

Includes bibliographical references and index.

9788132202325


Metal oxide semiconductors, Complementary--Design.
Random access memory.
Nanoelectronics.

621.381 / PAV-C
© 2024 IIIT-Delhi, library@iiitd.ac.in